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ADE7932 数据表(PDF) 103 Page - Analog Devices |
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ADE7932 数据表(HTML) 103 Page - Analog Devices |
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103 / 120 page  Data Sheet ADE7978/ADE7933/ADE7932 Rev. 0 | Page 103 of 120 Address Register Name R/W1 Bit Length Bit Length During Communication2 Type3 Default Value4 Description 0xE527 to 0xE52F Reserved These addresses should not be written for proper operation. 0xE530 NVRMS R 24 32 ZP S N/A Neutral line V1P voltage rms value. 0xE531 NV2RMS R 24 32 ZP S N/A Neutral line V2P voltage rms value. 0xE532 CHECKSUM R 32 32 U 0x6BF87803 Checksum verification (see the Checksum Register section for more information). 0xE533 VNOM R/W 24 32 ZP S 0x000000 Nominal phase voltage rms used in the alternative computation of the apparent power. 0xE534 to 0xE536 Reserved These addresses should not be written for proper operation. 0xE537 AFIRMS R 24 32 ZP S N/A Phase A fundamental current rms value. 0xE538 AFVRMS R 24 32 ZP S N/A Phase A fundamental voltage rms value. 0xE539 BFIRMS R 24 32 ZP S N/A Phase B fundamental current rms value. 0xE53A BFVRMS R 24 32 ZP S N/A Phase B fundamental voltage rms value. 0xE53B CFIRMS R 24 32 ZP S N/A Phase C fundamental current rms value. 0xE53C CFVRMS R 24 32 ZP S N/A Phase C fundamental voltage rms value. 0xE53D to 0xE5FE Reserved These addresses should not be written for proper operation. 0xE5FF LAST_ RWDATA32 R 32 32 U N/A Contains the data from the last successful 32-bit register communication. 0xE600 PHSTATUS R 16 16 U N/A Phase peak register (see Table 47). 0xE601 ANGLE0 R 16 16 U N/A Time Delay 0 (see the Time Interval Between Phases section for more information). 0xE602 ANGLE1 R 16 16 U N/A Time Delay 1 (see the Time Interval Between Phases section for more information). 0xE603 ANGLE2 R 16 16 U N/A Time Delay 2 (see the Time Interval Between Phases section for more information). 0xE604 to 0xE607 Reserved These addresses should not be written for proper operation. 0xE608 PHNOLOAD R 16 16 U N/A Phase no load register (see Table 48). 0xE609 to 0xE60B Reserved These addresses should not be written for proper operation. 0xE60C LINECYC R/W 16 16 U 0xFFFF Line cycle accumulation mode count. 0xE60D ZXTOUT R/W 16 16 U 0xFFFF Zero-crossing timeout count. 0xE60E COMPMODE R/W 16 16 U 0x01FF Computation mode register (see Table 49). 0xE60F Reserved This address should not be written for proper operation. 0xE610 CFMODE R/W 16 16 U 0x0E88 CFx configuration register (see Table 50). 0xE611 CF1DEN R/W 16 16 U 0x0000 CF1 denominator. 0xE612 CF2DEN R/W 16 16 U 0x0000 CF2 denominator. 0xE613 CF3DEN R/W 16 16 U 0x0000 CF3 denominator. 0xE614 APHCAL R/W 10 16 ZP U 0x0000 Phase calibration of Phase A (see Table 51). 0xE615 BPHCAL R/W 10 16 ZP U 0x0000 Phase calibration of Phase B (see Table 51). 0xE616 CPHCAL R/W 10 16 ZP U 0x0000 Phase calibration of Phase C (see Table 51). 0xE617 PHSIGN R 16 16 U N/A Power sign register (see Table 52). 0xE618 CONFIG R/W 16 16 U 0x0010 ADE7978 configuration register (see Table 53). 0xE619 to 0xE6FF Reserved These addresses should not be written for proper operation. |
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