 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
AD9549APCBZ 数据表(PDF) 62 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9549APCBZ 数据表(HTML) 62 Page - Analog Devices |
|
|
62 / 76 page  AD9549 Rev. D | Page 62 of 76 Register 0x01AC to Register 0x01AD—Phase Table 66. Bits Bit Name Description [7:0] DDS phase word Allows user to vary the phase of the DDS output. See the Direct Digital Synthesizer section. Register 0x01AC is the least significant byte of the phase offset word (POW). Note that a momentary phase discontinuity may occur as the phase passes through 45° intervals. Active only when the loop is not closed. Register 0x01AD—Phase (Continued) Table 67. Bits Bit Name Description [15:8] DDS phase word Allows user to vary the phase of the DDS output. See the Direct Digital Synthesizer section. Register 0x01AC is the least significant byte of the phase offset word (POW). Note that a momentary phase discontinuity may occur as the phase passes through 45° intervals. Active only when the loop is not closed. REFERENCE SELECTOR/HOLDOVER (REGISTER 0x01C0 TO REGISTER 0x01C3) Register 0x01C0—Automatic Control Table 68. Bits Bit Name Description 4 Holdover mode This bit determines which frequency tuning word (FTW) is used in holdover mode. 0 = use last FTW at time of holdover. 1 = use averaged FTW at time of holdover, which is the recommended setting. The number of averages used is set in Register 0x01C2. 3 Reserved Reserved. 2 Automatic selector Setting this bit permits state machine to switch the active reference clock input. 1 Automatic recover Setting this bit permits state machine to leave holdover mode. 0 Automatic holdover Setting this bit permits state machine to enter holdover (free-run) mode. Register 0x01C1—Override Table 69. Bits Bit Name Description 4 Enable line card mode Enables line card mode of reference switch MUX, which eliminates the possibility of a runt pulse during switchover. See the Use of Line Card Mode to Eliminate Runt Pulses section. 3 Enable ref input override Setting this bit disables automatic reference switchover, and allows user to switch references manually via Bit 2 of this register. Setting this bit overrides the REFSELECT pin. 2 REF_AB This bit selects the input when Bit 3 of this register is set. 0 = REFA. 1 Enable holdover override Setting this bit disables automatic holdover and allows user to enter/exit holdover manually via Bit 0 (see the description for Bit 0). Setting this bit overrides the HOLDOVER pin. 0 Holdover on/off This bit controls the status of holdover when Bit 1 of this register is set. Register 0x01C2—Averaging Window Table 70. Bits Bit Name Description [3:0] FTW windowed average size This register sets the number of FTWs (frequency tuning words) that are used for calculating the average FTW. Bit 4 in Register 0x01C0 enables this feature. An average size of at least 32,000 is recommended for most applications. The number of averages equals 2(FTWWindowed Average Size [3:0]). These samples are taken at the rate of (fs/2PIO). |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
