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AD9549APCBZ 数据表(PDF) 72 Page - Analog Devices |
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AD9549APCBZ 数据表(HTML) 72 Page - Analog Devices |
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72 / 76 page ![]() AD9549 Rev. D | Page 72 of 76 Register 0x0500—Spur A Table 133. Bits Bit Name Description 7 HSR-A enable Harmonic Spur Reduction A enable. 6 Amplitude gain × 2 [5:4] Reserved Reserved. [3:0] Spur A harmonic Spur A Harmonic 1 to Spur A Harmonic 15. Register 0x0501—Spur A (Continued) Table 134. Bits Bit Name Description [7:0] Spur A magnitude Linear multiplier for Spur A magnitude. Register 0x0503—Spur A (Continued) Table 135. Bits Bit Name Description [7:0] Spur A phase Linear offset for Spur A phase. Register 0x0504—Spur A (Continued) Table 136. Bits Bit Name Description 8 Spur A phase Linear offset for Spur A phase. Register 0x0505—Spur B Table 137. Bits Bit Name Description 7 HSR-B enable Harmonic Spur Reduction B enable. 6 Amplitude gain × 2 [5:4] Reserved Reserved. [3:0] Spur B harmonic Spur B Harmonic 1 to Spur B Harmonic 15. Register 0x0506—Spur B (Continued) Table 138. Bits Bit Name Description [7:0] Spur B magnitude Linear multiplier for Spur B magnitude. Register 0x0508—Spur B (Continued) Table 139. Bits Bit Name Description [7:0] Spur B phase Linear offset for Spur B phase. Register 0x0509—Spur B (Continued) Table 140. Bits Bit Name Description 8 Spur B phase Linear offset for Spur B phase. |
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