CS49310 datasheet(57/86 Pages) CIRRUS

57 / 86 page

CS49300 Family DSP

DS339PP4

In autoboot mode, latching the most significant

byte would be perfectly valid since the most

significant bits are guaranteed to be zeros (the three

bytes represent a true 24-bit address).

The flow chart given in Figure 36, "Autoboot

Sequence" on page 58 demonstrates the interaction

required by the microcontroller when placing the

DSP into autoboot mode. The host must first drive

the RESET line low.

After waiting for 175 ms, the application code

should be fully downloaded to the DSP, however

the designer should note that this time is typical and

may vary for each application code. During the

wait period, the host should ignore all INTREQ

behavior (mask the INTREQ interrupt). The host

can then verify that the code has successfully

initialized itself by sending a solicited read

command to the DSP to check for a known default

value.

For

example,

sending

Rd_Audio_Mgr_Request (0x090003) the host will

receive

Rd_Audio_Mgr_Response

(0x890003,

0x000000). If the first read attempt returns an

incorrect value, a 5ms wait should be inserted and

the read should be repeated. If a second invalid

response is read, the entire boot process should

then be repeated. When the number returned

matches the default value for the variable read, the

host can be confident that the application is resident

in the DSP and awaiting further instructions. An

application code user’s guide should be consulted

for information about reading a variable from the

part.

Hardware configuration messages are used to

define the behavior of the DSP’s audio ports. A

more detailed description of the different hardware

configurations can be found in Section 11,

“Hardware Configuration” on page 72.

The software configuration messages are specific

to each application. The software user’s guides

(AN163, AN163x, AN162, AN162x) for each

application code provides a list of all pertinent

configuration messages. Writing the KICKSTART

message to the CS493XX begins the audio decode

process. The KICKSTART message will also be

described in the user’s guide for each application.

Until the KICKSTART has been sent, the decoder

is in a wait state.

8.2.1. Autoboot INTREQ Behavior

It is important to note that ABOOT and INTREQ

are multiplexed on pin 20 of the CS493XX.

Because this pin serves as an input before reset, and

an output after reset, the host should release the

ABOOT line after RESET has gone high. As

shown

Figure 37,

"Autoboot

INTREQ

Behavior" on page 57, the host must drive ABOOT

low around the rising edge of RESET.

After the host has released the ABOOT line, it will

remain high while the DSP prepares to load code

from the external memory. INTREQ should be

ignored during download, i.e. interrupts should be

masked on the host. The download time will vary

according to the size of the download image and

the frequency of the main DSP clock. The autoboot

sequence is specified to complete within 200 ms

RESET

ABOOT

Trstsu

Trsthld

Driven Low by Host

Driven Low by CS492X

Download in Progress

Figure 37. Autoboot INTREQ Behavior

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