CS49310 datasheet(47/86 Pages) CIRRUS

47 / 86 page

CS49300 Family DSP

DS339PP4

byte, and the host should poll the Host Control

may write a control byte into the Host Message

3) The host knows that the DSP is ready for a new

control byte at this point and should write the

control byte to the Host Message Register

(A[1:0] = 00b).

4) If the host would like to write any more control

bytes to the CS493XX, the host should once

again poll the Host Control Register (return to

step 1).

6.2.3.2.Control Read in a Parallel Host Mode

When reading control data from the CS493XX, the

same protocol is used whether the host is reading a

single byte or a 6 byte message.

During the boot procedure, a handshaking protocol

is used by the CS493XX. This handshake consists

of a 3 byte write to the CS493XX followed by a 1

byte response from the DSP. The host must read the

response byte and act accordingly. The boot

procedure is discussed in Section 8.1, “Host Boot”

on page 52.

During regular operation (at run-time), the

responses from the CS493XX will always be 6

bytes in length.

The example shown in this section can be used for

any control read situation. The generic function

‘Read_Byte_*()’ is used in the following example

generalized

reference

either

Read_Byte_MOT()

Read_Byte_INT().

Figure 29 shows a typical read sequence. The

protocol presented in Figure 29 will now be

described in detail.

1) Optionally, INTREQ going low may be used as

an interrupt to the host to indicate that the

CS493XX has an outgoing message. Even with

the use of INTREQ, HOUTRDY must be

checked to insure that bytes are ready for the

host during the read process. Please note that

INTREQ does not go low to indicate an

outgoing message during boot.

2) The host reads the Host Control Register

(A[1:0] = 01b) in order to determine the state of

the communication interface. Please note that

‘Read_Byte_*()’ is a generalized reference to

either

Read_Byte_MOT()

Read_Byte_INT().

3) In order to determine whether the CS493XX

has an outgoing control byte that is valid, the

host must check the HOUTRDY bit of the Host

Control Register (bit 1). If HOUTRDY is high,

then the Host Message Register contains a valid

message byte for the host. If HOUTRDY is

low, then the DSP has not placed a new control

byte in the Host Message Register, and the host

should poll the Host Control Register again.

4) The host knows that the DSP is ready to

provide a new response byte at this point. The

Figure 28. Typical Parallel Host Mode Control

Write Sequence Flow Diagram

READ_BYTE_*(HOST CONTROL REGISTER)

WRITE_BYTE_*(HOST MESSAGE REGISTER)

MORE BYTES

HINSBY==1

YES

TO WRITE?

YES

FINISHED

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