CS49310 datasheet(46/86 Pages) CIRRUS

46 / 86 page

CS49300 Family DSP

DS339PP4

the host ends the write cycle by driving the CS

and DS pins high.

6.2.2.2.Reading a Byte in Motorola Mode

The flow diagram shown in Figure 27 illustrates

the sequence of events that define a one-byte read

in Motorola

mode.

The

protocol

presented

Figure 27 will now be described in detail.

1) The host must drive the A1 and A0 register

address pins of the CS493XX with the address

of the desired Parallel I/O Register. Note that

only the Host Message register and the Host

Control register can be read.

Host Message:

A[1:0]==00b.

Host Control:

A[1:0]==01b.

The host indicates that this is a read cycle by

driving the R/W pin high.

2) The host initiates the read cycle by driving the

CS and DS pins low.

3) Once the data is valid, the host can read the

value of the selected register from the

DATA[7:0] pins of the CS493XX.

4) The host should now terminate the read cycle

by driving the CS and DS pins high.

6.2.3. Procedures for Parallel Host Mode

Communication

6.2.3.1.Control Write in a Parallel Host Mode

When writing control data to the CS493XX, the

same protocol is used whether the host is writing a

control message or an entire executable download

image. Messages sent to the CS493XX should be

written most significant byte first. Likewise,

downloads of the application code should also be

performed most significant byte first.

The example shown in this section can be

generalized to fit any control write situation. The

generic function ‘Read_Byte_*()’ is used in the

following example as a generalized reference to

either Read_Byte_MOT() or Read_Byte_INT(),

and ‘Write_Byte_*()’ is a generic reference to

Write_Byte_MOT()

Write_Byte_INT().

Figure 28 shows a typical write sequence. The

protocol presented in Figure 28 will now be

described in detail.

1) When the host is communicating with the

CS493XX, the host must verify that the DSP is

ready to accept a new control byte. If the DSP

is in the midst of an interrupt service routine, it

will be unable to retrieve control data from the

Host Message Register. Please note that

‘Read_Byte_*()’ and ‘Write_Byte_*()’ are

generic references to either the Intel or

Motorola communication protocol.

If the most recent control byte has not yet been

read by the DSP, the host must not write a new

byte.

2) In order to determine whether the CS493XX is

ready to accept a new control byte the host must

check the HINBSY bit of the Host Control

DSP is not prepared to accept a new control

Figure 27. Motorola Mode, One-Byte Read Flow

Diagram

R/W (HIGH)

CS (L O W )

READ BYTE FROM

CS (HIGH)

ADDRESS A PARALLEL I/O REGISTER

D A T A [7:0]

DS (HIGH)

(A[1:0] SET APPROPRIATELY

DS (L O W )

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