CS49310 datasheet(45/86 Pages) CIRRUS

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CS49300 Family DSP

DS339PP4

4) The host should now terminate the read cycle

by driving the CS and RD pins high.

6.2.2. Motorola Parallel Host

Communication Mode

The Motorola parallel host communication mode is

implemented using the pins given in Table 7. The

INTREQ pin is controlled by the application code

when a parallel host communication mode has been

selected. When the code supports INTREQ

notification, the INTREQ pin is asserted whenever

the DSP has an outgoing message for the host. This

same information is reflected by the HOUTRDY

bit of the Host Control Register (A[1:0] = 01b).

INTREQ is useful for informing the host of

unsolicited messages. An unsolicited message is

defined as a message generated by the DSP without

an associated host read request. Unsolicited

messages can be used to notify the host of

conditions such as a change in the incoming audio

data type (e.g. PCM --> AC-3)

6.2.2.1.Writing a Byte in Motorola Mode

Information provided in this section is intended as

a functional description of how to write control

information to the CS493XX. The system designer

must insure that all of the timing constraints of the

Motorola Parallel Host Mode Write Cycle are met.

The flow diagram shown in Figure 26 illustrates

the sequence of events that define a one-byte write

in Motorola mode. The protocol presented in

Figure 26 will now be described in detail.

1) The host must drive the A1 and A0 register

address pins of the CS493XX with the address

of the address of the desired Parallel I/O

Host Message:

A[1:0]==00b.

Host Control:

A[1:0]==01b.

PCMDATA:

A[1:0]==10b.

CMPDATA:

A[1:0]==11b.

The host indicates that this is a write cycle by

driving the R/W pin low.

2) The host initiates a write cycle by driving the

CS and DS pins low.

3) The host drives the data byte to the DATA[7:0]

pins of the CS493XX.

4) Once the setup time for the write has been met,

Mnemonic

Pin Name

Pin Number

Chip Select

Data Strobe

Read or Write Select

R/W

Interrupt Request

INTREQ

DATA7

DATA6

DATA5

DATA4

DATA3

DATA2

DATA1

DATA0

Table 7. Motorola Mode Communication Signals

Figure 26. Motorola Mode, One-Byte Write Flow

Diagram

R/W (LOW)

CS (L O W )

WRITE BYTE TO

CS (HIGH)

DS (LO W )

ADDRESS A PARALLEL I/O REGISTER

DATA [7:0]

DS (HIGH)

(A[1:0] SET APPROPRIATELY

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