CS49310 datasheet(62/86 Pages) CIRRUS

62 / 86 page

CS49300 Family DSP

DS339PP4

whichever communication mode is chosen by

the host.

2) The host should then send the message

SOFT_RESET (0x000001). This will reset the

previously downloaded application with all of

the hardware configurations in their default

states. The application code user’s guide for

each application lists those parameters which

are affected by a SOFT_RESET.

3) After waiting 5 ms to allow the downloaded

application to initialize, the host can send

configuration messages for both hardware and

software configuration.

This method of resetting the DSP is usually

referred to as a “soft reset” even though it involves

toggling the reset pin.

Table 12 lists some possible external memory

configurations for each DSP, in conjunction with

IBA codes stored in the host microcontroller. The

table provides a list of the ROM content, the size of

the combined memory images, the recommended

page size, and the number of discrete pages

required. The examples also include several figures

which present the different ROM configurations as

composite memory images.

The CS49292, CS493102, and CS493112 all have

special memory requirements since they must have

access to external SRAM (70nS or faster) during

the decoding of AAC Multichannel (5.1 Channel)

audio. More specifically this SRAM requirement is

ONLY required for AAC application code which is

capable of outputting 5.1 discrete channels, but is

not required of application code that offers a 2

channel downmixed output.

Also, for the CS49330, there are certain releases

THX Surround EX (5.1 Channel and 7.1 Channel

versions), and THX Ultra2 Cinema (7.1 Channel

version

only)

application

codes

that

offer

additional all-channel delay, and for this a 1Mbit or

2Mbit, 70nS SRAM is also required. The THX

Surround EX application codes (5.1 Channel or 7.1

Channel) nor the THX Ultra2 Cinema code do not

Figure 39. Performing a Reset

WRITE_*

WRITE_* (SOFTRESET,

MSG_SIZE)

RESET(LOW) (NOTE 1)

RESET(HIGH) (NOTE 2)

WAIT

500

µs

WAIT 5 ms (NOTE 3)

(CONFIGURATION_MESSAGES,

CONFIG_MSG_SIZE)

(NOTE 4)

Notes: 1. RESET must be held LOW for trstl.

2. It should be noted that mode pins are used to configure

the CS493XX communication mode. These mode pins

are latched internally on the rising edge of reset and

can be set dynamically by a microprocessor or can be

statically pulled HIGH or LOW. If these pins are driven

dynamically, setup and hold times must be satisfied as

stated in the CS493XX Datasheet. More information

about the function of the mode pins can be found in the

CS493XX Datasheet and in Section 6, “Control” on

page 32.

3. 5 ms is typical but this time is application code specific

and may be as high as 10 ms. Wait times should be

verified by the designer.

4. Configuration messages determine both hardware and

software configuration. Hardware configurations are

described in Section 11 of this manual. Software

application configuration messages are described in

the Application Code User’s Guide for the code being

used.

CS49310 数据表(PDF) 62 Page - Cirrus Logic

CS49310 数据表(HTML) 62 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86

数据表下载