CS49310 datasheet(76/86 Pages) CIRRUS

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CS49300 Family DSP

DS339PP4

11.3. Output Data Hardware Configuration

The naming convention for the DAO configuration

is as follows:

OUTPUT A B C D E

where the parameters are defined as:

A - DAO Mode (Master/Slave for LRCLK and

SCLK)

B - Data Format

C - MCLK Frequency

D - SCLK Frequency

E - SCLK Polarity

The following tables show the different values for

each parameter as well as the hex message that

needs to be sent. When creating the hardware

configuration message, only one hex message

should be sent per parameter.

A Value

DAO Modes (LRCLK &

SCLK)

Hex

Message

(default)

MCLK - Slave

SCLK - Slave

LRCLK - Slave

0x80017F

0x400000

1MCLK - Slave

SCLK - Master

LRCLK - Master

0x80027F

0xBFFFFF

MCLK - Master

SCLK - Master

LRCLK - Master

0x80027F

0xBFDFFF

Table 22. Output Clock Configuration

(Parameter A)

B Value

DAO Data Format Of

AUDATA0, 1, 2 (or AUDATA0

for Multichannel Modes)

Hex

Message

(default)

I2S 24-bit

(Configuration of AUDATA3 as S/PDIF

(IEC60958) or Digital Audio in the

format of I2S or Left Justified is

covered in AN162 and AN163)

0x80027F

0xFC7FFF

0x80027C

0xF01F00

0x80027D

0xF01F00

0x80027E

0xF01F00

0x80017F

0x038000

0x80017C

0x000001

0x80017D

0x000001

0x80017E

0x000001

Left Justified 24-bit

(Configuration of AUDATA3 as S/PDIF

(IEC60958) or Digital Audio in the

format of I2S or Left Justified is

covered in AN162 and AN163)

0x80027F

0xFC7FFF

0x80027C

0xF01F00

0x80027D

0xF01F00

0x80027E

0xF01F00

0x80017F

0x018000

Multichannel (6 channel)

20-bit Left Justified

(SCLK must be at least 128Fs

for this mode)

(Configuration of AUDATA3 as S/PDIF

(IEC60958) or Digital Audio in the

format of I2S or Left Justified is

covered in AN162 and AN163)

0x80027F

0xFC7FFF

0x80027C

0xF00000

0x80017C

0x001300

0x80027D

0xF00000

0x80017D

0x001300

0x80027E

0xF00000

0x80017E

0x001300

Table 23. Output Data Format Configuration

(Parameter B)

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