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RM0319 数据表(PDF) 367 Page - STMicroelectronics |
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RM0319 数据表(HTML) 367 Page - STMicroelectronics |
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367 / 368 page  RM0319 Document revision history Doc ID 022640 Rev 4 367/368 Document revision history Table 128. Document revision history Date Revision Changes 10-Apr-2012 1 Initial release 07-Sep-2012 2 Section 4: Multilayer interconnect matrix (BUSMATRIX): Updated Table 28 and Table 29 on page 77 Added note on DMA port connections Section 5: BootROM added UART0 and Ethernet boot modes. Updated description of bypass mode. Section 15: Controller area network ports (CAN) added Figure 71 and Figure 72 Section 17: I2C bus ports (I2C): Updated Section 17.4.2 DMA and Section 17.3.3 Master mode REFCLK specified as crystal clock in Section 29.3.6: Watchdog module clock enable generation Section 10.3.2: EHCI host controller: updated description for 2 downstream ports Added Section 21.3.3: High-resolution mode 19-Oct-2012 3 Updated FIRDA Section 19.3.2: Demodulation unit Updated BootROM Section 5.6.7: Ethernet boot 23-Nov-2012 4 Changed references to EMI_ACK signal to EMI_WAIT# Section 9: External memory interface (EMI) and updated Example 2 in Section 9.4: Programming examples. Updated Table 123: Watchdog module counter decremented: changed the two lines “The counter is decremented on every second WDOGCLK rising edge” with “The counter is decremented on every WDGCLKEN rising edge”. Updated Section 29.3.6: Watchdog module clock enable generation. |
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