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PM0223 数据表(PDF) 64 Page - STMicroelectronics |
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PM0223 数据表(HTML) 64 Page - STMicroelectronics |
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64 / 110 page ![]() The STM32L0 Cortex-M0+ Instruction Set PM0223 64/110 DocID025763 Rev 1 3.5.9 TST Test bits. Syntax TST Rn, Rm where: Operation This instruction tests the value in a register against another register. It updates the condition flags based on the result, but does not write the result to a register. The TST instruction performs a bitwise AND operation on the value in Rn and the value in Rm . This is the same as the ANDS instruction, except that it discards the result. To test whether a bit of Rn is 0 or 1, use the TST instruction with a register that has that bit set to 1 and all other bits cleared to 0. Restrictions In these instructions, Rn and Rm must only specify R0-R7. Condition flags This instruction: • updates the N and Z flags according to the result • does not affect the C or V flags. Examples TST R0, R1 ; Perform bitwise AND of R0 value and R1 value, ; condition code flags are updated but result is discarded Rn Is the register holding the first operand. Rm The register to test against. |
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