PM0223 datasheet(41/110 Pages) STMICROELECTRONICS

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PM0223

The STM32L0 Cortex-M0+ Instruction Set

Figure 9. ASR#3

LSR

Logical shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n

places, into the right-hand 32-n bits of the result, and it sets the left-hand n bits of the result

to 0. See Figure 10 on page 41.

You can use the LSR operation to divide the value in the register Rm by 2n, if the value is

regarded as an unsigned integer.

When the instruction is LSRS, the carry flag is updated to the last bit shifted out, bit[n-1], of

the register Rm.

Note:

If n is 32 or more, then all the bits in the result are cleared to 0.

If n is 33 or more and the carry flag is updated, it is updated to 0.

Figure 10. LSR#3

LSL

Logical shift left by n bits moves the right-hand 32-n bits of the register Rm, to the left by n

places, into the left-hand 32-n bits of the result, and it sets the right-hand n bits of the result

to 0. See Figure 11 on page 42.

You can use the LSL operation to multiply the value in the register Rm by 2n, if the value is

regarded as an unsigned integer or a two’s complement signed integer. Overflow can occur

without warning.

When the instruction is LSLS the carry flag is updated to the last bit shifted out, bit[32-n],

of the register Rm. These instructions do not affect the carry flag when used with LSL#0.

Note:

If n is 32 or more, then all the bits in the result are cleared to 0.

If n is 33 or more and the carry flag is updated, it is updated to 0.

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