PM0223 datasheet(95/110 Pages) STMICROELECTRONICS

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PM0223

STM32L0 Core Peripherals

108

System Handler Priority Register 3

The bit assignments are

4.3.9

SCB usage hints and tips

Ensure software uses aligned 32-bit word size transactions to access all the SCB registers.

4.4

SysTick timer (STK)

When enabled, the timer counts down from the reload value to zero, reloads (wraps to) the

value in the SYST_RVR on the next clock cycle, then decrements on subsequent clock

cycles. Writing a value of zero to the SYST_RVR disables the counter on the next wrap.

When the counter transitions to zero, the COUNTFLAG status bit is set to 1. Reading

SYST_CSR clears the COUNTFLAG bit to 0.Writing to the SYST_CVR clears the register

and the COUNTFLAG status bit to 0. The write does not trigger the SysTick exception logic.

Reading the register returns its value at the time it is accessed.

Note:

When the processor is halted for debugging the counter does not decrement.

The system timer registers are:

PRI_15

PRI_14

5432

Reserved

Bits 31:24 PRI_15: Priority of system handler 15, SysTick exception(1)

Bits 23:16 PRI_14: Priority of system handler 14, PendSV

Bits 15:0

Reserved, must be kept cleared

1. This is Reserved when the SysTick timer is not implemented.

Table 33. System timer registers summary

Address

Name

Type

Required

privilege

Reset value

Description

0xE000E010

STK_CSR

Privileged 0x00000000

4.4.1: SysTick Control and Status

0xE000E014

STK_RVR

Privileged Unknown

4.4.2: SysTick Reload Value

0xE000E018

STK_CVR

Privileged Unknown

4.4.3: SysTick Current Value

0xE000E01C

STK_CALIB RO

Privileged 0xC0000000(1)

SysTick calibration value.

4.4.4: SysTick Calibration Value

page 97.

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