PM0223 datasheet(50/110 Pages) STMICROELECTRONICS

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The STM32L0 Cortex-M0+ Instruction Set

PM0223

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DocID025763 Rev 1

3.4.5

LDM and STM

Load and Store Multiple registers.

Syntax

LDM Rn{!}, reglist

STM Rn!, reglist

where:

LDMIA

and LDMFD are synonyms for LDM. LDMIA refers to the base register being

Incremented After each access. LDMFD refers to its use for popping data from Full

Descending stacks.

STMIA

and STMEA are synonyms for STM. STMIA refers to the base register being

Incremented After each access. STMEA refers to its use for pushing data onto Empty

Ascending stacks.

Operation

LDM

instructions load the registers in reglist with word values from memory addresses

based on Rn.

STM

instructions store the word values in the registers in reglist to memory addresses

based on Rn.

The memory addresses used for the accesses are at 4-byte intervals ranging from the value

in the register specified by Rn to the value in the register specified by Rn + 4 * (n-1), where n

is the number of registers in reglist. The accesses happens in order of increasing

the highest number register using the highest memory address. If the writeback suffix is

specified, the value in the register specified by Rn + 4 *n is written back to the register

specified by Rn.

Restrictions

In these instructions:

•

reglist

and Rn are limited to R0-R7.

•

The writeback suffix must always be used unless the instruction is an LDM where reglist

also contains Rn, in which case the writeback suffix must not be used.

•

The value in the register specified by Rn must be word aligned. See 3.3.4: Address

alignment on page 42 for more information.

•

For STM, if Rn appears in reglist, then it must be the first register in the list.

Condition flags

These instructions do not change the flags.

Is the register on which the memory addresses are based.

Writeback suffix.

reglist

Is a list of one or more registers to be loaded or stored, enclosed in braces. It

can contain register ranges. It must be comma separated if it contains more

than one register or register range, see Examples on page 51.

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