PC87366 datasheet(3/240 Pages) NSC

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Features (Continued)

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— Shadow register support for write-only bit monitoring

— UART data rates up to 1.5 Mbaud

• Serial Port 2 with Infrared (UART2)

— Software compatible with the 16550A and the 16450

— Shadow register support for write-only bit monitoring

— UART data rates up to 1.5 Mbaud

— HP-SIR

— ASK-IR option of SHARP-IR

— DASK-IR option of SHARP-IR

— Consumer Remote Control supports RC-5, RC-6,

NEC, RCA and RECS 80

— Non-standard DMA support

− 1 or 2 channels

— PnP dongle support

• Keyboard and Mouse Controller (KBC)

— 8-bit microcontroller

— Software compatible with the 8042AH and PC87911

microcontrollers

— 2 KB custom-designed program ROM

— 256 bytes RAM for data

— Five programmable dedicated open-drain I/O lines

— Asynchronous access to two data registers and one

status register during normal operation

— Support for both interrupt and polling

— 93 instructions

— 8-bit timer/counter

— Support for binary and BCD arithmetic

— Operation at 8 MHz,12 MHz or 16 MHz (programma-

ble option)

— Can be customized by using the PC87323, which in-

cludes a RAM-based KBC as a development plat-

form for KBC code

• ACCESS.bus Interface (ACB)

— Serial interface compatible with SMBus physical layer

— Compatible with Philips’ I2C®

— ACB master and slave

— Supports polling and interrupt controlled operation

— Optional internal pull-up on SDA and SCL pins

• WATCHDOG Timer (WDT)

— Times out the system based on user-programmable

time-out period

— System power-down capability for power saving

— User-deﬁned trigger events to restart WATCHDOG

— Optional routing of WATCHDOG output on IRQ

and/or SMI lines

• System Wake-Up Control (SWC)

— Power-up request upon detection of Keyboard,

Mouse, RI1, RI2, RING activity and General-Pur-

pose Input Events, as follows:

t Preprogrammed Keyboard or Mouse sequence

t External modem ring on serial port

t Ring pulse or pulse train on the RING input signal

t Preprogrammed CEIR address in a preselected

standard (NEC, RCA or RC-5)

t General-Purpose Input Events

t IRQs of internal logical devices

— Optional routing of power-up request on IRQ, SMI

and/or PWBTOUT

— Battery-backed event conﬁguration

— Programmable VSB-powered output for blinking

LEDs (LED1, LED2) control

• Clock Sources

— 48 MHz clock input

— LPC clock, up to 33 MHz

— On-chip low frequency clock generator for wake-up

• Power Supplies

— 3.3V supply operation

— Main (VDD and AVDD)

— Standby (VSB)

— Battery backup (VBAT)

— All pins are 5V tolerant and back-drive protected, ex-

cept LPC bus pins

• Strap Configuration

— Base Address (BADDR) strap to determine the base

address of the Index-Data register pair

— Test strap to force the device into test mode (re-

served for National Semiconductor use)

— Power Supply and LED Conﬁguration (PSLDC0,1)

straps to determine the power suppy control func-

tions and the VSB power-up defaults of LED2

— Power Supply On Polarity (PSONPOL) strap to set

PSON active state and output type

PC87366 数据表(PDF) 3 Page - National Semiconductor (TI)

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