PC87366 datasheet(5/240 Pages) NSC

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Table of Contents

Datasheet Revision Record

............................................................................................................ 4

........................................................................................................................................................................... 4

1.0

Signal/Pin Connection and Description

1.1

CONNECTION DIAGRAM ......................................................................................................... 16

1.2

BUFFER TYPES AND SIGNAL/PIN DIRECTORY .................................................................... 17

1.3

PIN MULTIPLEXING ................................................................................................................. 22

1.4

DETAILED SIGNAL/PIN DESCRIPTIONS ................................................................................ 24

1.4.1

ACCESS.bus Interface (ACB) .................................................................................... 24

1.4.2

Bus Interface ............................................................................................................... 24

1.4.3

Clock ............................................................................................................................ 24

1.4.4

Fan Speed Control and Monitor (FSCM) ..................................................................... 24

1.4.5

Floppy Disk Controller (FDC) ...................................................................................... 25

1.4.6

Game Port ..................................................................................................................26

1.4.7

General-Purpose Input/Output (GPIO) Ports ............................................................... 26

1.4.8

Infrared (IR) ................................................................................................................. 26

1.4.9

Keyboard and Mouse Controller (KBC)

..................................................................... 27

1.4.10

Musical Instrument Digital Interface (MIDI) Port .......................................................... 27

1.4.11

Parallel Port

............................................................................................................... 28

1.4.12

Power and Ground ..................................................................................................... 28

1.4.13

Protection .................................................................................................................... 29

1.4.14

Serial Port 1 and Serial Port 2 ..................................................................................... 29

1.4.15

Strap Configuration ...................................................................................................... 30

1.4.16

System Hardware Monitoring ...................................................................................... 30

1.4.17

System Wake-Up Control ............................................................................................ 31

1.4.18

WATCHDOG Timer (WDT) ......................................................................................... 31

1.5

INTERNAL PULL-UP AND PULL-DOWN RESISTORS ............................................................ 32

2.0

Device Architecture and Configuration

2.1

OVERVIEW ............................................................................................................................... 34

2.2

CONFIGURATION STRUCTURE AND ACCESS ..................................................................... 34

2.2.1

The Index-Data Register Pair ...................................................................................... 34

2.2.2

Banked Logical Device Registers Structure ................................................................ 36

2.2.3

Standard Logical Device Configuration Register Definitions ....................................... 37

2.2.4

Standard Configuration Registers ............................................................................... 39

2.2.5

Default Configuration Setup ........................................................................................ 40

2.2.6

Power States ...............................................................................................................40

2.2.7

Address Decoding ....................................................................................................... 41

2.3

PROTECTION ........................................................................................................................... 41

2.3.1

Chassis Intrusion Detection ......................................................................................... 41

2.3.2

Pin Configuration Lock ................................................................................................ 41

2.3.3

GPIO Pin Function Lock .............................................................................................. 42

2.4

POWER SUPPLY CONTROL (PSC) ......................................................................................... 42

2.5

LED OPERATION AND STATES .............................................................................................. 44

PC87366 数据表(PDF) 5 Page - National Semiconductor (TI)

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