| 数据搜索系统,热门电子元器件搜索 |
|
PC87366 数据表(PDF) 8 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87366 数据表(HTML) 8 Page - National Semiconductor (TI) |
|
8 / 240 page ![]() (Continued) 8 www.national.com 3.4.8 Wake-Up Events Routing to SMI Enable Register 1 (WK_SMIEN1) ........................... 94 3.4.9 Wake-Up Events Routing to IRQ Enable Register 0 (WK_IRQEN0) ........................... 95 3.4.10 Wake-Up Events Routing to IRQ Enable Register 1 (WK_IRQEN1) ........................... 96 3.4.11 Wake-Up Extension 1 Enable Register 0 (WK_X1EN0) .............................................. 97 3.4.12 Wake-Up Extension 1 Enable Register 1 (WK_X1EN1) .............................................. 98 3.4.13 Wake-Up Extension 2 Enable Register 0 (WK_X2EN0) .............................................. 99 3.4.14 Wake-Up Extension 2 Enable Register 1 (WK_X2EN1) ............................................ 100 3.4.15 Wake-Up Extension 3 Enable Register 0 (WK_X3EN0) ............................................ 101 3.4.16 Wake-Up Extension 3 Enable Register 1 (WK_X3EN1) ............................................ 102 3.4.17 PS/2 Keyboard and Mouse Wake-Up Events ............................................................ 103 3.4.18 PS/2 Protocol Control Register (PS2CTL) ................................................................. 104 3.4.19 Keyboard Data Shift Register (KDSR) ....................................................................... 104 3.4.20 Mouse Data Shift Register (MDSR) ........................................................................... 105 3.4.21 PS/2 Keyboard Key Data Registers (PS2KEY0 - PS2KEY7) .................................... 105 3.4.22 CEIR Wake-Up Control Register (IRWCR) ............................................................... 106 3.4.23 CEIR Wake-Up Address Register (IRWAD) .............................................................. 107 3.4.24 CEIR Wake-Up Address Mask Register (IRWAM) .................................................... 107 3.4.25 CEIR Address Shift Register (ADSR) ........................................................................ 108 3.4.26 CEIR Wake-Up Range 0 Registers ........................................................................... 108 3.4.27 CEIR Wake-Up Range 1 Registers ........................................................................... 109 3.4.28 CEIR Wake-Up Range 2 Registers ........................................................................... 109 3.4.29 CEIR Wake-Up Range 3 Registers ........................................................................... 110 3.4.30 Standby General-Purpose I/O (SBGPIO) Register Overview .................................... 111 3.4.31 Standby GPIO Pin Select Register (SBGPSEL) ........................................................ 114 3.4.32 Standby GPIO Pin Configuration Register (SBGPCFG) ........................................... 115 3.4.33 Standby GPIOE/GPIE Data Out Register 0 (SB_GPDO0) ........................................ 117 3.4.34 Standby GPIOE/GPIE Data In Register 0 (SB_GPDI0) ............................................ 117 3.4.35 Standby GPOS Data Out Register 1 (SB_GPDO1) .................................................. 118 3.4.36 Standby GPIS Data In Register 1 (SB_GPDI1) ......................................................... 118 3.5 SWC REGISTER BITMAP ....................................................................................................... 119 4.0 Fan Speed Control 4.1 OVERVIEW ............................................................................................................................. 123 4.2 FUNCTIONAL DESCRIPTION ................................................................................................ 123 4.3 FAN SPEED CONTROL REGISTERS .................................................................................... 124 4.3.1 Fan Speed Control Register Map .............................................................................. 124 4.3.2 Fan Speed Control Pre-Scale Register (FCPSR) ...................................................... 124 4.3.3 Fan Speed Control Duty Cycle Register (FCDCR) .................................................... 125 4.4 FAN SPEED CONTROL BITMAP ........................................................................................... 125 5.0 Fan Speed Monitor 5.1 OVERVIEW ............................................................................................................................. 126 5.2 FUNCTIONAL DESCRIPTION ................................................................................................ 126 5.3 FAN SPEED MONITOR REGISTERS ..................................................................................... 127 5.3.1 Fan Speed Monitor Register Map .............................................................................. 127 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |