| 数据搜索系统,热门电子元器件搜索 |
|
PC87366 数据表(PDF) 36 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87366 数据表(HTML) 36 Page - National Semiconductor (TI) |
|
36 / 240 page ![]() 2.0 Device Architecture and Configuration (Continued) 36 www.national.com 2.2.2 Banked Logical Device Registers Structure Each functional block is associated with a Logical Device Number (LDN). The configuration registers are grouped into banks, where each bank holds the standard configuration registers of the corresponding logical device. Table 6 shows the LDN values of the PC87366 functional blocks. Figure 2 shows the structure of the standard configuration register file. The SuperI/O control and configuration registers are not banked and are accessed by the Index-Data register pair only, as described above. However, the device control and device configuration registers are duplicated over 15 banks for 15 logical devices. Therefore, accessing a specific register in a specific bank is performed by two dimensional indexing, where the LDN register selects the bank (or logical device) and the Index register selects the register within the bank. Accessing the Data register while the Index register holds a value of 30h or higher results in a physical access to the Logical Device Configuration registers currently pointed to by the Index register, within the logical device currently selected by the LDN register. Figure 2. Structure of the Standard Configuration Register File Table 6. Logical Device Number (LDN) Assignments LDN Functional Block 00h Floppy Disk Controller (FDC) 01h Parallel Port (PP) 02h Serial Port 2 with IR (SP2) 03h Serial Port 1 (SP1) 04h System Wake-Up Control (SWC) 05h Keyboard and Mouse Controller (KBC) - Mouse interface 06h Keyboard and Mouse Controller (KBC) - Keyboard interface 07h General-Purpose I/O (GPIO) Ports 08h ACCESS.bus Interface (ACB) 09h Fan Speed Control and Monitor (FSCM) 0Ah WATCHDOG Timer (WDT) 0Bh Game Port (GMP) 0Ch Musical Instrument Digital Interface (MIDI) Port 0Dh Voltage Level Monitor (VLM) 0Eh Temperature Sensor (TMS) 07h 20h 30h 60h 75h FEh Logical Device Number Register SuperI/O Configuration Registers Logical Device Control Register Standard Logical Device Special (Vendor-defined) Configuration Registers Banks 2Fh F0h Bank Select 63h 74h 70h 71h Configuration Registers (One per Logical Device) Logical Device |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |