PC87366 datasheet(63/240 Pages) NSC

部件名	PC87366

功能描述	128-Pin LPC SuperI/O with System Hardware Monitoring, MIDI and Game Ports

PDF	240 Pages

Scroll/Zoom	100%

制造商	NSC [National Semiconductor (TI)]

网页	http://www.national.com

标志

63 / 240 page

2.0 Device Architecture and Configuration (Continued)

www.national.com

2.13 SYSTEM WAKE-UP CONTROL (SWC) CONFIGURATION

2.13.1

Logical Device 4 (SWC) Configuration

Table 24 lists the configuration registers which affect the SWC. See Sections 2.2.3 and 2.2.4 for a detailed description of

these registers.

Table 24. System Wake-Up Control (SWC) Conﬁguration Registers

Index

Conﬁguration Register or Action

Type

Reset

30h

Activate. When bit 0 is cleared, the registers of this logical device are not

accessible. Note 1.

Note 1. The logical device registers are maintained, and all wake-up detection mechanisms are func-

tional.

R/W

00h

60h

Base Address MSB register

R/W

00h

61h

Base Address LSB register. Bits 4-0 (for A4-0) are read only, 00000b.

R/W

00h

70h

Interrupt Number

R/W

00h

71h

Interrupt Type. Bit 1 is read/write. Other bits are read only.

R/W

03h

74h

Report no DMA assignment

04h

75h

Report no DMA assignment

04h

PC87366 数据表(PDF) 63 Page - National Semiconductor (TI)

PC87366 数据表(HTML) 63 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载