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PC87366 数据表(PDF) 71 Page - National Semiconductor (TI) |
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PC87366 数据表(HTML) 71 Page - National Semiconductor (TI) |
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71 / 240 page ![]() 2.0 Device Architecture and Configuration (Continued) 71 www.national.com 2.15.6 GPIO Event Routing Register This register enables the routing of the GPIO event to IRQ, SMI and/or PWUREQ signals. It is implemented only for ports 0,1 and 4 which have event detection capability. This register is reset by hardware to 00h. Location: Index F2h Type: R/W Bit 76543210 Name Reserved Enable PWUREQ Routing Enable SMI Routing Enable IRQ Routing Reset 00000001 Bit Description 7-3 Reserved 2 Enable PWUREQ Routing 0: Disabled (default) 1: Enabled 1 Enable SMI Routing 0: Disabled (default) 1: Enabled 0 Enable IRQ Routing 0: Disabled 1: Enabled (default) |
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