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PC87366 数据表(PDF) 174 Page - National Semiconductor (TI) |
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PC87366 数据表(HTML) 174 Page - National Semiconductor (TI) |
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174 / 240 page ![]() 10.0 Musical Instrument Digital Interface (MIDI) Port (Continued) 174 www.national.com 10.3.4 MIDI Status Register (MSTAT) This read register provides status information regarding the functional blocks of the MIDI Port. Location: Offset 01h Type: R 10.3.5 MIDI Command Register (MCOM) This write register is a port via which commands are issued by the host to the MIDI Port. Location: Offset 01h Type: W Bit 76543210 Name Rx Buffer Empty Tx Buffer Full Rx FIFO Full MIDI Port Operation Mode Rx Overrun Error Tx FIFO Not Empty Reserved Reset 10000000 Bit Description 7 Rx Buffer Empty. When set to 1, it indicates that the Receive Buffer in Pass-Thru mode, or the FIFO in UART mode, is empty. When set to 0, it indicates that the Receive Buffer or FIFO contain data that can be read via the MDI register. 0: Not empty 1: Empty (default) 6 Tx Buffer Full. When set to 1, it indicates that the Transmit Buffer or FIFO cannot accept any more data. When set to 0, it indicates that the Transmit Buffer or FIFO can accept more data written to the MDO register. 0: Not full (default) 1: Full 5 Rx FIFO Full. When set to 1, it indicates that the Receive FIFO cannot accept any more received data bytes. When set to 0, it indicates that the Receive FIFO can accept more received data bytes. This bit is forced to 0 when the FIFOs are disabled. 0: Not full or disabled (default) 1: Full 4 MIDI Port Operation Mode. When set to 1, it indicates that the MIDI Port is currently operating in UART mode. When set to 0, it indicates that the MIDI Port is currently operating in Pass-Thru (non-UART) mode. 0: Pass-Thru mode (default) 1: UART mode 3 Rx Overrun Error. This bit is cleared to 0 when the MSTAT register is read. An overrun error is defined as the state in which one or more data bytes have been received by the MIDI Port while the Receive Buffer, or FIFO, was full. 0: No overrun error (default) 1: Overrun error 2 Tx FIFO Not Empty. This bit is forced to 0 when the FIFOs are disabled. 0: Empty or disabled (default) 1: Not empty 1-0 Reserved Bit 76543210 Name Command Byte Reset XXXXXXXX |
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