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LPC802 数据表(PDF) 18 Page - NXP Semiconductors

部件名 LPC802
功能描述  32-bit ARM Cortex-M0 microcontroller
PDF  83 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

LPC802 数据表(HTML) 18 Page - NXP Semiconductors

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LPC802
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.6 — 27 April 2018
18 of 83
NXP Semiconductors
LPC802
32-bit ARM Cortex-M0+ microcontroller
• The switch matrix provides level shifter functionality to allow up to two selected
signals to be routed from user-selected pins in one voltage domain to selected pins in
the alternate domain. This feature can also be used on a single supply device if
voltage level shifting is not required.
Remark: The functionality of each I/O pin is flexible and is determined entirely through the
switch matrix. See Section 9.9 for details.
9.8.1 Standard I/O pad configuration
Figure 10 shows the possible pin modes for standard I/O pins with analog input function:
• Digital output driver with configurable open-drain output.
• Digital input: Weak pull-up resistor (PMOS device) enabled/disabled.
• Digital input: Weak pull-down resistor (NMOS device) enabled/disabled.
• Digital input: Repeater mode enabled/disabled.
• Digital input: Programmable input digital filter selectable on all pins.
• Analog input: Selected through the switch matrix.
Fig 10. Standard I/O pad configuration
PIN
VDD
VDD
ESD
VSS
ESD
strong
pull-up
strong
pull-down
VDD
weak
pull-up
weak
pull-down
open-drain enable
output enable
repeater mode
enable
pull-up enable
pull-down enable
select data
transmission
gate
inverter
data output
data input
analog input
SWM PINENABLE for
analog input
pin configured
as digital output
driver
pin configured
as digital input
pin configured
as analog input
aaa-028401



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