LPC802 datasheet(39/83 Pages) NXP

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LPC802

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Product data sheet

Rev. 1.6 — 27 April 2018

39 of 83

NXP Semiconductors

LPC802

32-bit ARM Cortex-M0+ microcontroller

11. Thermal characteristics

The average chip junction temperature, Tj (C), can be calculated using the following

equation:

(1)

• Tamb = ambient temperature (C),

• Rth(j-a) = the package junction-to-ambient thermal resistance (C/W)

• PD = sum of internal and I/O power dissipation

The internal power dissipation is the product of IDD and VDD. The I/O power dissipation of

the I/O pins is often small and many times can be negligible. However it can be significant

in some applications.

Table 10.

Thermal resistance

Symbol

Parameter

Conditions

Max/min

Unit

TSSOP20 package

Rth(j-a)

thermal resistance from

junction-to-ambient

JEDEC (4.5 in

 4 in); still air 11015 %

C/W

single-layer (4.5 in

 3 in); still

air

153

15 %

C/W

Rth(j-c)

thermal resistance from

junction-to-case

15 %

C/W

TSSOP16 package

Rth(j-a)

thermal resistance from

junction-to-ambient

JEDEC (4.5 in

 4 in); still air 13315 %

C/W

single-layer (4.5 in

 3 in); still

air

182

15 %

C/W

Rth(j-c)

thermal resistance from

junction-to-case

15 %

C/W

HVQFN33 package

Rth(j-a)

thermal resistance from

junction-to-ambient

JEDEC (4.5 in

 4 in); still air 4315 %

C/W

single-layer (4.5 in

 3 in); still

air

115

15 %

C/W

Rth(j-c)

thermal resistance from

junction-to-case

15 %

C/W

WLCSP16 package

Rth(j-a)

thermal resistance from

junction-to-ambient

JEDEC (4.5 in

 4 in); still air 69.215 %

C/W

single-layer (4.5 in

 3 in); still

air

168

15 %

C/W

Rth(j-c)

thermal resistance from

junction-to-case

1.1

15 %

C/W

amb

th j

–







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