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LPC802 数据表(PDF) 6 Page - NXP Semiconductors |
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LPC802 数据表(HTML) 6 Page - NXP Semiconductors |
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6 / 83 page  LPC802 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved. Product data sheet Rev. 1.6 — 27 April 2018 6 of 83 NXP Semiconductors LPC802 32-bit ARM Cortex-M0+ microcontroller The LPC802 TSSOP16 packages have the following top-side marking: • First line: LPC802 • Second line: M001J • Third line: xxxx • Fourth line: ywwx[R] – yww: Date code with y = year and ww = week. – xR = Boot code version and device revision. The LPC802 WLCSP16 packages have the following top-side marking: • First line: LPC802 • Second line: xxxxx • Third line: xyywwx[R] – yyww: Date code with ww = week and yy = year. – xR = Boot code version and device revision. • Fourth line: xxx - yyy Table 3. Device revision table Revision identifier (R) Revision description 0A Initial device revision with Boot ROM version 13.0 1A Initial device revision with Boot ROM version 13.1 1B Initial device revision with Boot ROM version 13.1 |
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