LPC802 datasheet(41/83 Pages) NXP

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LPC802

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Product data sheet

Rev. 1.6 — 27 April 2018

41 of 83

NXP Semiconductors

LPC802

32-bit ARM Cortex-M0+ microcontroller

[1]

Typical ratings are not guaranteed. The values listed are for room temperature (25

C), VDD = 3.3 V.

[2]

Characterized through bench measurements using typical samples.

[3]

IDD measurements were performed with all pins configured as GPIO outputs driven LOW and pull-up resistors disabled.

[4]

FRO enabled.

[5]

BOD disabled.

[6]

All peripherals disabled in the SYSAHBCLKCTRL register. Peripheral clocks disabled in system configuration block.

[7]

All oscillators and analog blocks turned off.

[8]

WAKEUP function pin pulled HIGH externally.

[9]

Tested in production, VDD = 3.6 V.

[10] LPOsc enabled, FRO disabled.

Table 12.

Static characteristics, supply pins

Tamb = 40 C to +105 C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1][2]

Max[9]

Unit

IDD

supply current

Active mode; code

while(1){}

executed from flash;

system clock = 1 MHz

VDD = 3.3 V

[3][5][6][10] -0.5

system clock = 9 MHz

VDD = 3.3 V

[3][4][5][6] -0.8

system clock = 12 MHz

VDD = 3.3 V

[3][4][5][6] -1.0

system clock = 15 MHz

VDD = 3.3 V

[3][4][5][6] -1.3

Sleep mode

system clock = 9 MHz

VDD = 3.3 V

[3][4][5][6] -0.4

system clock = 12 MHz

VDD = 3.3 V

[3][4][5][6] -0.5

system clock = 15 MHz

VDD = 3.3 V

[3][4][5][6] -0.6

IDD

supply current

Deep-sleep mode;

VDD = 3.3 V;

Tamb =25 C

[3][7] -

100

175

A

Tamb =105 C

240

A

IDD

supply current

Power-down mode;

VDD = 3.3 V

Tamb =25 C

[3][7] -

614

A

Tamb =105 C-

A

IDD

supply current

Deep power-down mode;

VDD = 3.3 V;

Tamb =25 C

[8]

-0.15

0.5

A

Tamb =105 C-

A

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