EM6812F2TP24B datasheet(40/81 Pages) EMMICRO

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10.3.1 Register map

Table 36. Port A Reset and wake-up registers

RegCfgPA

0x23

Configuration settings for reset and wake-up system.

Bit

Name

Res

Reset by

R/W

Description

Excl_nComb

ResMain

R/W

Mode selection for reset and wake-up system

‘0’=Input combination, ‘1’=Individual bit action

Wk_nRes

ResMain

R/W

Selects either reset or wake-up function

‘0’=Reset, ‘1’=Wake-up

(has no action if SplitCmb=0)

SplitCmb

ResMain

R/W

PA[7:4] = Reset combination

PA[3:0] = Wake-up combination

‘0’=full port A, ‘1’=port A split,

EnDebResInp

ResSysSlp

R/W

Enable the reset debouncer function

‘0’=No debouncer, ‘1’= debouncer enabled

CkDebResInp

ResMain

R/W

Select the reset debouncer clock

‘0’=Pr1Ck[8] (256Hz); ‘1’=Pr1Ck[13] (8kHz)

EnDebWk

ResSysSlp

R/W

Enable the wake-up debouncer function

‘0’=No debouncer, ‘1’= debouncer enabled

CkDebWk

ResMain

R/W

Select the wake-up debouncer clock

‘0’=Pr1Ck[8] (256Hz); ‘1’=Pr1Ck[13] (8kHz)

RCLoop

ResSys

R/W

Enable the RC Osc Loop on PA[6], PA[4]

‘0’=RC Loop disabled, ‘1’= RC Loop enabled

RegMskRstWkUp

0x26

Input mask for reset and wake-up selection

Bit

Name

Res

Reset by

R/W

Description

7-0

MskRstWkUp[7:0]

ResMain

R/W

Input selection for reset and wake-up system

1=input selected, 0= do not care

RegCmbKey

0x25

Reset and Wake-up key definition

Bit

Name

Res

Reset by

R/W

Description

7-0

CmbKey[7:0]

ResMain

R/W

Reset and wake-up key

0=match if 0, 1=match if 1

10.3.2 Input splitting

Both reset and wake-up functions can be activated if the port A is split in 2 parts. PA[7:4] gets the reset function and PA[3:0]

the wake-up. With the bit SplitCmb=’0’ (no split of port A) only the function defined by bit Wk_nRes is active.

10.3.3 Actions

Resetting the microcontroller on condition match.

Wake-up signal to the microcontroller on condition match.

Reset will trigger a system reset (ResSys)

Wake-up will resume from unclocked CPU low power modes. Its main actions are:

•

In Halt mode: Sending Event to the CPU (resumes from HALT mode back to active mode).

Refer to Interrupt section. Wake-up will activate signal DebWakeUP and give the CPUEvent0.

•

In Sleep mode: Cancel Sleep mode (resets the Sleep bit, CPU restarts from adr 0).

10.3.4 Condition match

A match condition is obtained if either all selected bits match (AND-function for Combination trigger) or at least one of the

selected bits match the input status (OR-function for Exclusive trigger).

Combination

(AND-Type): The PA input, 4 or 8 bit, need to fully match the corresponding combination key pattern, except

for the ‘don’t care’ bits to trigger reset and/or wake-up.

Exclusive

(OR-Type): At least 1 combination key bit matching a selected PA input pin status will trigger reset and/or wake-

up if not inhibited by a ‘don’t care’ condition.

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