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EM6812F2TP24B 数据表(PDF) 32 Page - EM Microelectronic - MARIN SA |
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EM6812F2TP24B 数据表(HTML) 32 Page - EM Microelectronic - MARIN SA |
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32 / 81 page  R EM6812 Copyright © 2005, EM Microelectronic-Marin SA 32 www.emmicroelectronic.com 8.8 Registers overview Table 25. Clock management registers RegSys1 0x10 Bit Name Res Reset by R/W Description 7 Sleep 0 ResSys R/W Put the circuit in sleep mode if = ‘1’ 6 DisResetPad 0 POR R/W Disable the input pad reset if = ‘1’ 5 DisResInp 0 POR R/W Disable the port A reset input if = ‘1’ 4 FlagXtal 0 ResMain R Xtal cold start flag, Xtal ready if = ‘1’ 3 OPTCldStart[1] 0 POR R/W 2 OPTCldStart[0] 0 POR R/W Xtal cold start duration: ‘00’ = 1s, ‘10’ = 3/4s, ‘01’=1/2s, and ‘11’=1/4s. 1 FreqRange 0 ResSys R/W RC osc. frequency range selection: ‘1’=10MHz ‘0’=1MHz 0 EnRC 1 ResSys R/W Enable RC oscillator if = ‘1’ RegSys2 0x11 Bit Name Res Reset by R/W Description 7 EnXtal 0 ResMain R/W Enable Xtal oscillator if = ‘1’ 6 SelExtHFck 0 ResMain R/W Enable external clock instead of RC if = ‘1’ 5 SelHFckSource 0 ResMain R/W Select external clock PA4 if '0', PA5 if '1' 4 SelExtLFck 0 ResMain R/W Enable external clock instead of Xtal if = ‘1’ 3 -- 0 -- R/W Not used, read always ‘0’ 2 Sel32k 0 ResMain R/W CPU clock ‘1’=low freq (F1) ‘0’=high freq (F2) 1 RCDiv[1] 1 ResMain R/W 0 RCDiv[0] 1 ResMain R/W HF domain division factor for F2: ‘00’=1, ‘01’=2 , ‘10’=4, ‘11’=8 RegPr1Status 0x15 Bit Name Res Reset by R/W Description 7-0 Pr1CkStatus[7:0] 01 ResSys R/C* Prescaler1 Clock status on 8 MSB RegPr2Status 0x16 Bit Name Res Reset by R/W Description 7-0 Pr2CkStatus[7:0] 00 ResSys R/C* Prescaler2 Clock status on 8 MSB C*: Write access resets the register value (8 MSB counter values) RegTrimRC 0x13 Bit Name Res Reset by R/W Description 7-0 Trim[7:0] 7F ResMain R/W RC oscillator trimming byte RegPrCkSel 0x14 Bit Name Res Reset by R/W Description 7 Pr1CkSel[2] 0 ResSys R/W 6 Pr1CkSel[1] 0 ResSys R/W 5 Pr1CkSel[0] 1 ResSys R/W Refer to the ’ Table 23. Prescaler1 clock selection, non-automatic mode ‘ 4 AutoSel 1 ResSys R/W Auto prescaler1 clock selection to ~32kHz 3 Pr2CkSel 1 ResSys R/W Prescaler2 clock selection ‘0’=low freq (F1), 1=high freq / 2 (F2 / 2). 2 -- 1 -- R Read always ‘1’ 1 -- 1 -- R Read always ‘1’ 0 -- 0 -- R Read always ‘0’ Table 26. Clock interrupts mapping Interrupt source Priority IntCtrl connection Pr1Ck[0] (1Hz if Xtal) 0 Int0[1] Pr1Ck[5] (32Hz if Xtal 0 Int0[2] Pr1Ck[7] (128Hz if Xtal) 0 Int0[3] |
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