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EM6812F2TP24B 数据表(PDF) 18 Page - EM Microelectronic - MARIN SA |
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EM6812F2TP24B 数据表(HTML) 18 Page - EM Microelectronic - MARIN SA |
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18 / 81 page  R EM6812 Copyright © 2005, EM Microelectronic-Marin SA 18 www.emmicroelectronic.com 7.1.1 Reset functions registers Table 16: Reset register overview Functions Register name Basic function Reset status RegResStat Reset Flags to identify reset source RegResStat Direct or debounced input and debouncer clock selection Reset Pad configuration RegSys1 Disable the reset pad input BrownOut RegAnaCfg Enabling the Brownout function (default: On) RegCfgPA Reset and wake-Up system configuration, RegMskRstWkUp Combination mask selection Reset PA input configuration Refer to PortA description RegCmbKey Reset or wake-up key RegWDkey Watchdog reset RegWDSys Watchdog setup and keylock Table 17: Reset registers detail RegResStat 0x12 Reset Flags to determine the reset source Bit Name Res Reset by R/W Description 7 ResetPadFlag 0 POR RC Flag for Reset terminal, clear by write’0’ 6 ResetWDFlag 0 POR RC Flag for watchdog reset, clear by write’0’ 5 ResInpPAFlag 0 POR RC Flag for PortA input reset ,clear by write’0’ Flag is also set by BrownOut in case of DisResInp=’1’ 4 ResBwnOutFlag 0 POR RC Flag for BrownOut reset, clear by write’0’ 3 SleepEn 0 POR R/W Enables to write the Sleep bit 2 EnDebResPad 0 ResSysSlp R/W ‘1’: Debounced reset input ‘0’: Direct reset input 1 CkDebResPad 0 ResSys R/W ‘1’: high speed clock (Pr1Ck[13], 8kHz) ‘0’: low speed clock (Pr1Ck[8], 256Hz) 0 DatOscOut - - R Read data on Oscout terminal if XTAL off RegSys1 0x10 User reset handling Bit Name Res Reset by R/W Description 7 Sleep 0 ResSys R/W Put the circuit in sleep mode if = ‘1’ 6 DisResetPad 0 POR R/W Disable the Input pad reset if = ‘1’ 5 DisResInp 0 POR R/W Disable the port A reset input if = ‘1’ 4 FlagXtal 0 ResMain R Xtal cold start flag, XTal ready if = ‘1’ 3 OPTCldStart[1] 0 POR R/W 2 OPTCldStart[0] 0 POR R/W Xtal cold start duration: ‘00’ = 1s, ‘10’ = 3/4s, ‘01’=1/2s, and ‘11’=1/4s. 1 FreqRange 0 ResSys R/W RC osc. frequency range selection: ‘1’=10MHz 0=1MHz 0 EnRC 1 ResSys R/W Enable RC oscillator if = ‘1’ RegWDSys 0x3B Watchdog setup register including key lock Bit Name Res Reset by R/W Description 7 WDClear 0 -- R/W Clear the WD counterby writing ‘1’ =Reset; ‘0’=no action. Read is always ‘0’ 6 EnWD 1 ResSys R/W Enable watchdog = ‘1’. The key word must be loaded prior to force EnWD=’0’ 5 WDVal[1] 0 ResSys R WD counter status, MSB-bit 4 WDVal[0] 0 ResSys R WD counter status , LSB-bit 3 WDClkSel 0 ResSys R/W Clock selection. ‘0’ = Pr1Ck[0] (typ 1Hz) ‘1’ = Pr1Ck[7] (typ 128Hz) 2 WDKeyLock[2] 0 ResSys R/W 1 WDKeyLock[1] 0 ResSys R/W 0 WDKeyLock[0] 0 ResSys R/W Unlock the key work if = ‘111’ |
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