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EM6812F2TP24B 数据表(PDF) 44 Page - EM Microelectronic - MARIN SA |
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EM6812F2TP24B 数据表(HTML) 44 Page - EM Microelectronic - MARIN SA |
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44 / 81 page  R EM6812 Copyright © 2005, EM Microelectronic-Marin SA 44 www.emmicroelectronic.com 11.2 Register map, PB IO functions Table 38. Port B registers overview Functions Register name Basic function RegInPB Direct read of input terminal state RegOutPB Data output register Base RegIOSelPB Direction selection RegPullUpPB Pull-up resistor selection RegPullDownPB Pull-down resistor selection Pull resistor and open drain RegOpenDrainPB Enable n-channel open drain output Dual Port RAM selection Freq. output selection Serial Interface selection RegCfgPB Configures the corresponding bits accordingly the mode selection. See also 11.1.1 Special function priority handling Signal selection RegSigSel Selection of the internal signal to put on port B Table 39. Port B registers RegInPB 0x30 Input register Bit Name Res Reset by R/W Description 7-0 PBIn[7:0] -- - R Direct read of input terminal state ‘0’=read low, ‘1’= read high RegOutPB 0x31 Output data Bit Name Res Reset by R/W Description 7-0 OutPB[7:0] 00 ResSys R/W Data output register ‘0’= output low, ‘1’=output high RegIOSelPB 0x34 Direction register Bit Name Res Reset by R/W Description 7-0 IOSelPB[7:0] 00 ResSys R/W Direction selection; ‘1’=Output, ‘0’=Input RegPullUpPB 0x36 Pull-up selection Bit Name Res Reset by R/W Description 7-0 PullUpPB[7:0] 00 ResMain R/W Pull-up resistor selection ‘0’=no pull-up, ‘1’=pull-up enabled RegPullDownPB 0x37 Pull-down selection Bit Name Res Reset by R/W Description 7-0 PullDownPB[7:0] FF ResMain R/W Pull-down resistor selection ‘0’=no pull-down, ‘1’=pull-down enabled (if no pull- up) RegOpenDrainPB 0x35 N-channel Open drain selection Bit Name Res Reset by R/W Description 7-0 OpenDrainPB[7:0] 00 ResMain R/W N-channel open drain selection (if output) ‘0’=CMOS mode, ‘1’= open drain enabled RegCfgPB 0x32 Port B configuration settings, DPR, SPI, Signals Bit Name Res Reset by R/W Description 7 EnDualRAM 0 ResSys R/W Enable the Dual Port RAM 6 EnSPI 0 ResSys R/W Enable the Serial Interface function 5 EnSig1 0 ResSys R/W Connecting the internal Signal1 on PB[0] 4 EnSig2 0 ResSys R/W Connecting the internal Signal2 on PB[1] 3 EnSig3 0 ResSys R/W Connecting the internal Signal3 on PB[2] 2 EnSig4 0 ResSys R/W Connecting the internal Signal4 on PB[3] 1 - -- -- R Reads ‘0’ 0 - -- -- R Reads ‘0’ |
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