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EM6812F2TP24B 数据表(PDF) 5 Page - EM Microelectronic - MARIN SA |
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EM6812F2TP24B 数据表(HTML) 5 Page - EM Microelectronic - MARIN SA |
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5 / 81 page ![]() R EM6812 Copyright © 2005, EM Microelectronic-Marin SA 5 www.emmicroelectronic.com 2 Circuit Connectivity The EM6812 has the same pin-out in both the SO24 and TSSOP24 pin package. Minimum connectivity includes the power supply on VSS and VDD, a capacitor on Vreg, and de-coupling capacitance on VDD. Circuit reference terminal (substrate) is on VSS. The 32kHz Crystal is only needed for systems requiring low frequency Crystal operation. The integrated supply voltage regulator filters supply noise and allows lowest power peripheral operations. For proper operation, a capacitor (470nF minimum) must be connected to the regulator’s VREG terminal. This terminal must not be used for any other outside connection. Figure 1: Sample minimum connectivity Note: • ALL circuit IO's (except OscIn) are on VDD level. OscIn terminal is only used in conjunction with an quartz Crystal. The terminal input voltages must never exceed the Vreg voltage. • The quartz crystal should be shielded with VSS to keep noise away. • When using the Crystal oscillator PA[7] and PA[6] should preferably used as static inputs only to avoid noise coupling on the OscIn and OscOut high impedance inputs. PB3 PB2 PB1 PB0 i.c. VSS Test Reset PA0 PA1 PA2 PA3 PA7 PA6 PA5 PA4 Vreg VDD OscOut OscIn PB5 PB6 PB7 VDD 32khz VDD VSS 470nF PB4 Reset Button Shield with VSS VSS 10k |
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