EM6812F2TP24B datasheet(45/81 Pages) EMMICRO

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EM6812

www.emmicroelectronic.com

RegSigSel

0x33

Bit

Name

Res

Reset by

R/W

Description

7-6

Sig1Sel[1:0]

ResSys

R/W

Select internal Signal1 for output on PB[0]

5-4

Sig2Sel[1:0]

ResSys

R/W

Select internal Signal2 for output on PB[1]

3-2

Sig3Sel[1:0]

ResSys

R/W

Select internal Signal3 for output on PB[2]

1-0

Sig4Sel[1:0]

ResSys

R/W

Select internal Signal4 for output on PB[3]

Internal signal selection for frequency output on port B when corresponding signal enable bit is set.

SigXSel[1:0]=’00’

SigXSel[1:0]=’01’

SigXSel[1:0]=’10’

SigXSel[1:0]=’11’

Description

Sig4Sel[1:0]

PWM4

Not PWM3

Pr1Ck[11]

Pr1Ck[0]

Output on PB[3]

Sig3Sel[1:0]

PWM3

Not PWM4

Pr2CkSource

Pr1CkSource

Output on PB[2]

Sig2Sel[1:0]

PWM2

Not PWM1

Pr1Ck[11]

Pr1Ck[0]

Output on PB[1]

Sig1Sel[1:0]

PWM1

Not PWM2

Pr2CkSource

Pr1CkSource

Output on PB[0]

11.3

Normal IO operation

Port B input terminal status can always be read directly. All registers influencing the IO modes are bit-wise selectable. The

integrated, switchable pull resistors and the selectable output drive mode allow a maximum of different terminal modes.

Refer to Table 32. Port A IO mode for the details.

Default state after power up on all PB terminals is input mode with pull-down resistor.

Table 40. Port B settings in normal mode

Normal mode

−

No SPI selection

−

No Frequency out selection

−

No Dual Port Ram output mode

Notes

Input mode

High-Z

Port may be left floating

Input mode with pull-up

Weak Hi

Pull-up has priority

Input mode with pull-down

Weak Lo

Default state after Power-up

Output mode, CMOS high drive

Pull resistors disabled

Output mode, CMOS low drive

Pull resistors disabled

Output mode, open drain, high-Z

High-Z

Pull-down disabled

Port may be left floating

Output mode, open drain with pull-up

Weak Hi

Pull-up active

Output mode, open drain drive low

Pull-up disabled

11.4

Special IO operation

11.4.1 Frequency Output

Signal1 to Signal4, PWM and Prescaler frequencies

Table 41. Port B settings in Frequency out mode

Frequency output terminals

−

PWM

−

Pr1ck[n]

−

Pr1CkSource, Pr2CkSource

Notes

Output mode, CMOS high drive

Signal

Selected signal output

Output mode, NCH open drain

0 / High-Z

Selected signal output,

needs external pull-up

Output mode, NCH open drain, Pull-up

0 / Weak Hi

Signal output, pull-up intern

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