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EM6812F2TP24B 数据表(PDF) 8 Page - EM Microelectronic - MARIN SA |
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EM6812F2TP24B 数据表(HTML) 8 Page - EM Microelectronic - MARIN SA |
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8 / 81 page  R EM6812 Copyright © 2005, EM Microelectronic-Marin SA 8 www.emmicroelectronic.com 3 Operating modes The EM6812 has 3 main operation modes. • Active Mode - CPU up and running, Instruction executing, Periphery clocked. • Standby Mode - CPU stopped, No Instruction execution, Periphery clocked. • Sleep Mode – CPU reset, No Instruction execution, Periphery stopped. Within these operating modes different submodes exist with different clock selections to allow lowest power consumption for all given cases. Please refer to the clock- managing unit and the specific peripherals for all clock selections possibilities. When not activated the embedded peripherals are not clocked and therefore do not add any unnecessary power consumption. Figure 3. Operating modes transition Table 2. Mode dependent peripheral status Peripheral block Active mode Standby mode Sleep mode CPU Running at defined Clock frequency Stopped Reset Clock source Running at defined Clock frequency Running at defined Clock frequency All internal clock sources are off SVLD Software selectable Software selectable Disabled BrownOut Software selectable Software selectable Disabled POR On On On Prescalers On On Off – no clock, retain value Interrupts/ Events Possible Possible Wake-up only Watchdog timer Software selectable Software selectable Off – no clock, retain value Timer Software selectable Software selectable Off – no clock, retain value Ports Software selectable Software selectable Retain state, input debouncers are by-passed. RAM Software selectable Software selectable Retains value 3.1 Active mode The active mode is the default mode after power-up. The CPU executes instructions one after the other. All peripheral settings are performed in this mode before eventualy switching to low power modes. Any interrupt arriving will immediately at the next instruction branch into the interrupt vector. 3.2 Standby Mode The standby mode is the commonly used low power dissipation mode. During standby the CPU instruction execution is halted but all peripheral circuitry is still clocked. Any interrupt or event will bring the circuit back into active mode on the next active CPU clock edge. Standby mode is entered with the CPU HALT instruction. 3.3 Sleep Mode This is the lowest power possible mode. Circuit operation is stopped (no clock anymore) most peripheries retain their value. Exceptions are: • The debouncer circuits are by-passed to allow reaset or wake-up. • SVLD and Brownout function are disabled to have minimum power dissipation. • CPU is in reset state. To go into sleep mode one needs first to set bit SleepEn = ‘1’, then Sleep = ‘1’. While SleepEn =’0’ one can not write the Sleep bit. Resume from sleep mode by either wake-up on pre-specified port A combination (refer to 7.4) or by any reset. Inspection of the reset status register allows determining the restart origin. Standby Active Sleep IRQ, Event HALT Instruction Start-up Reset Sleep bit Reset Reset Reset Reset IRQ, Event & CPU Instruction execution Wake-Up |
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