ZUSBOPTSC01ZAC datasheet(62/402 Pages) ZILOG

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General-Purpose I/O

P R E L I M I N A R Y

PS024604-1005

Z8 Encore!® Motor Control Flash MCUs

Product Specification

Port A-C Address Registers

The Port A–C Address registers select the GPIO port functionality accessible through the

Port A–C Control registers. The Port A–C Address and Control registers combine to pro-

vide access to all GPIO port control. See Table 15.

Table 16 lists the Port Control subregisters that are accessible via the Port A–C Control

registers.

Table 14. GPIO Port Registers and Subregisters

Port Register Mnemonic

Port Register Name

PxADDR

Port A–C Address Register—selects subregisters.

PxCTL

Port A–C Control Register—provides access to

subregisters.

PxIN

Port A–C Input Data Register.

PxOUT

Port A–C Output Data Register.

Port Subregister Mnemonic

Port Register Name

PxDD

Data Direction

PxAF0

Alternate Function 0

PxAF1

Alternate Function 1—Ports A and B only.

PxOC

Output Control (open-drain).

PxHDE

High Drive Enable.

PxSMRE

Stop-Mode Recovery Source Enable.

PxPUE

Pull-Up Enable.

PxIRQES

Interrupt Edge Select—Ports A and C only.

IRQPSEL

Interrupt Port Select—Port A only.

Table 15. Port A–C GPIO Address Registers (PxADDR)

BITS

FIELD

PADDR[7:0]

RESET

00H

R/W

ADDR

FD0H, FD4H, FD8H

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