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ZUSBOPTSC01ZAC 数据表(PDF) 68 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 68 Page - Zilog, Inc. |
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68 / 402 page ![]() General-Purpose I/O P R E L I M I N A R Y PS024604-1005 Z8 Encore!® Motor Control Flash MCUs Product Specification 46 Port A Interrupt Edge Select Subregister The Interrupt Edge Select (IRQES) Subregister, shown in Table 24, determines whether an interrupt is generated for the rising edge or falling edge on the selected GPIO Port A input pin. Table 23. Port A–C Pull-Up Enable Sub-Registers BITS 7 6 5 4 3 2 1 0 FIELD PPUE7 PPUE6 PPUE5 PPUE4 PPUE3 PPUE2 PPUE1 PPUE0 RESET 0 0 0 000 00 R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR If 06H in Port A–C Address Register, accessible through the Port A–C Control Register Bit Position Value (H) Description [7:0] PPUE 0 Port Pull-Up Enable The weak pull-up on the Port pin is disabled. 1 The weak pull-up on the Port pin is enabled. Table 24. Interrupt Edge Select Sub-Register (IRQES) BITS 7 6 5 4 3 2 1 0 FIELD Reserved IES3 IES2 IES1 IES0 RESET 0 0 0 000 00 R/W RR RR R/W R/W R/W R/W ADDR If 08H in Port A Address Register, accessible through the Port A and Port C Control Register Bit Position Value (H) Description [3:0] IESx 0 Interrupt Edge Select x An interrupt request is generated on the falling edge of the PAx input. 1 An interrupt request is generated on the rising edge of the PAx input, where x indicates the specific GPIO Port pin number (0 through 7). |
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