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ZUSBOPTSC01ZAC 数据表(PDF) 45 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 45 Page - Zilog, Inc. |
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45 / 402 page ![]() PS024604-1005 P R E L I M I N A R Y Reset Types Z8FMC16100 Series Flash MCU Product Specification 23 Reset and Stop-Mode Recovery The Reset Controller within the Z8FMC16100 Series Flash MCU controls RESET and Stop-Mode Recovery operation. In typical operation, the following events cause a RESET to occur: • Power-On Reset (POR) • Voltage Brown-Out (VBO) • Watch-Dog Timer time-out (when configured via the WDT_RES Option Bit to initiate a Reset) • External RESET pin assertion • On-Chip Debugger initiated RESET (OCDCTL[0] set to 1) • Fault detect logic When the Z8FMC16100 Series Flash MCU is in STOP mode, a Stop-Mode Recovery is initiated by either of the following: • Watch-Dog Timer time-out • GPIO port input pin transition on an enabled Stop-Mode Recovery source Reset Types The Z8FMC16100 Series Flash MCU provides two different types of reset operation (Sys- tem Reset and Stop-Mode Recovery). The type of reset is a function of both the current operating mode of the Z8FMC16100 Series Flash MCU and the source of the reset. Table 6 lists the types of reset and their operating characteristics. Table 6. Reset and Stop-Mode Recovery Characteristics and Latency Reset Type Reset Characteristics and Latency Peripheral Control Registers eZ8 CPU Reset Latency (Delay) System Reset Reset (as applicable) RESET A minimum of 66 Internal Precision Oscillator cycles. Stop-Mode Recovery Unaffected, except RSTSRC and OSCCTL registers Reset A minimum of 66 Internal Precision Oscillator cycles. |
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