ZUSBOPTSC01ZAC datasheet(66/402 Pages) ZILOG

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General-Purpose I/O

P R E L I M I N A R Y

PS024604-1005

Z8 Encore!® Motor Control Flash MCUs

Product Specification

Port A–C High Drive Enable Subregisters

The Port A–C High Drive Enable subregisters, shown in Table 21, are accessed through

the Port A-C Control registers by writing 04h to the Port A–C Address registers. Setting

the bits in the Port A–C High Drive Enable subregisters to 1 configures the specified port

pins for high current output drive operation. The Port A–C High Drive Enable subregisters

affect the pins directly and, as a result, alternate functions are also affected.

Port A–C Stop-Mode Recovery Source Enable Subregisters

The Port A–C Stop-Mode Recovery Source Enable subregisters, shown in Table 22, are

accessed through the Port A–C Control registers by writing 05h to the Port A-C Address

registers. Setting the bits in the Port A–C Stop-Mode Recovery Source Enable subregisters

to 1 configures the specified port pins as a Stop-Mode Recovery source. During STOP

mode, any logic transition on a port pin enabled as a Stop-Mode Recovery source initiates

Stop-Mode Recovery.

Table 21. Port A–C High Drive Enable Sub-Registers

BITS

FIELD

PHDE7

PHDE6

PHDE5

PHDE4

PHDE3

PHDE2

PHDE1

PHDE0

RESET

000

R/W

R/WR/W

ADDR

If 04H in Port A-C Address Register, accessible through the Port A-C Control Register

Bit

Position

Value

(H)

Description

[7:0]

PHDE

Port High Drive Enable

The Port pin is configured for standard output current drive.

The Port pin is configured for high output current drive.

ZUSBOPTSC01ZAC 数据表(PDF) 66 Page - Zilog, Inc.

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