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ZUSBOPTSC01ZAC 数据表(PDF) 98 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 98 Page - Zilog, Inc. |
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98 / 402 page ![]() Pulse-Width Modulator P R E L I M I N A R Y PS024604-1005 Z8 Encore!® Motor Control Flash MCUs Product Specification 76 PWMH and PWML—PWM High and Low Bytes These 2 bytes, {PWMH[3:0], PWML[7:0]}, contain the current 12-bit PWM count value. PWM Reload High and Low Byte Registers The PWM Reload High and Low Byte (PWMRH and PWMRL) registers, shown in Table 44 and Table 45, store a 12-bit reload value, {PWMRH[3:0], PWMRL[7:0]}. The PWM reload value is held in buffer registers. The PWM reload value written to the buffer regis- ters is not used by the PWM generator until the next PWM reload event occurs. Reads from these registers always return the values from the buffer registers. Table 43. PWM Low Byte Register (PWML) BITS 7 6 5 4 3 2 1 0 FIELD PWML RESET 00H R/W R/W ADDR F2DH Edge-Aligned PWM Mode Period = Prescaler x Reload Value fPWMCLK Center-Aligned PWM Mode Period = 2 x Prescaler x Reload Value fPWMCLK Table 44. PWM Reload High Byte Register (PWMRH) BITS 7 6 5 4 3 2 1 0 FIELD Reserved PWMRH RESET 0H FH R/W R/W R/W ADDR F2EH |
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