ZUSBOPTSC01ZAC datasheet(43/402 Pages) ZILOG

43 / 402 page

PS024604-1005

P R E L I M I N A R Y

Z8FMC16100 Series Flash MCU

Product Specification

FC3

Interrupt Request 1 Register

IRQ1

FC4

IRQ1 Enable High Bit Register (IRQ1ENH)

IRQ1ENH

FC5

IRQ1 Enable Low Bit Register (IRQ1ENL)

IRQ1ENL

FC9–FCE Reserved

—

FCF

Interrupt Control Register

IRQCTL

GPIO Port A

FD0

Port A Address

PAADDR

FD1

Port A Control

PACTL

FD2

Port A Input Data

PAIN

FD3

Port A Output Data

PAOUT

GPIO Port B

FD4

Port B Address

PBADDR

FD5

Port B Control

PBCTL

FD6

Port B Input Data

PBIN

FD7

Port B Output Data

PBOUT

GPIO Port C

FD8

Port C Address

PCADDR

FD9

Port C Control

PCCTL

FDA

Port C Input Data

PCIN

FDB

Port C Output Data

PCOUT

Reset and Watch-Dog Timer (WDT)

FF0

Reset Status and Control Register

RSTSTAT

see Table 10

FF1

Reserved

—

FF2

Watch-Dog Timer Reload High Byte Register

(WDTH)

WDTH

FF3

Watch-Dog Timer Reload Low Byte Register

(WDTL)

WDTL

FF4–FF5

Reserved

—

Table 5. Register File Address Map (Continued)

Address

(Hex)

Mnemonic

Reset (Hex)

Page #

Note: XX = undefined.

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