 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ZUSBOPTSC01ZAC 数据表(PDF) 75 Page - Zilog, Inc. |
|
|
|||||||||||||||||||||||||||||
ZUSBOPTSC01ZAC 数据表(HTML) 75 Page - Zilog, Inc. |
|
|
75 / 402 page  PS024604-1005 P R E L I M I N A R Y Architecture Z8FMC16100 Series Flash MCU Product Specification 53 Architecture Figure 6 illustrates a block diagram of the interrupt controller. Master Interrupt Enable The master interrupt enable bit (IRQE) in the Interrupt Control Register globally enables and disables interrupts. Interrupts are globally enabled by any of the following actions: • Execution of an Enable Interrupt (EI) instruction • Execution of a Return from Interrupt (IRET) instruction • Writing a 1 to the IRQE bit in the Interrupt Control Register Interrupts are globally disabled by any of the following actions: • Execution of a Disable Interrupt (DI) instruction • eZ8 CPU acknowledgement of an interrupt service request from the interrupt controller • Writing a 0 to the IRQE bit in the Interrupt Control Register • Reset Figure 6. Interrupt Controller Block Diagram Port Interrupts Vector Service Request High Priority Medium Priority Priority Mix Low Priority Internal Interrupts System Exceptions |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
