ZUSBOPTSC01ZAC datasheet(51/402 Pages) ZILOG

51 / 402 page

PS024604-1005

P R E L I M I N A R Y

PWM Fault0 and Reset pin selection

Z8FMC16100 Series Flash MCU

Product Specification

Short pulses on the Port pin can initiate Stop-Mode Recovery without initiating an in-

terrupt (if enabled for that pin).

PWM Fault0 and Reset pin selection

The RESET pin can be set to function as a PWM Fault input. When selected, the RESET

input function is disabled. The FLTSEL bit in the Reset Status and Control Register allows

software selection of the RESET pin function. The pin function is selected by writing the

the unlock sequence followed by the mode to this register. A software write to the FLTSEL

bit will override the value set by the FLTSEL user option bit

Reset Control Register Definitions

Writing the 14h, 92h unlock sequence to the Reset Status and Control Register address

unlocks access to the FLTSEL bit. The locking mechanism prevents spurious writes to this

bit. The following sequence is required to unlock this register and write the FLTSEL bit.

1. Write 14h to the Reset Status and Control Register (RSTSTAT).

2. Write 92h to the Reset Status and Control Register (RSTSTAT).

3. Write the FLTSEL bit.

All steps of the unlock sequence must be written in the order listed.

Reset Status and Control Register

The Reset Status (RSTSTAT) Register, shown in Table 9, records the cause of the most

recent Reset or Stop-Mode Recovery. All status bits are updated on each Reset or Stop-

Mode Recovery event. Table 10 indicates the possible states of the Reset status bits fol-

lowing a Reset or Stop-Mode Recovery event. The RESET pin function is also select with

FLTSEL

bit.

Caution:

ZUSBOPTSC01ZAC 数据表(PDF) 51 Page - Zilog, Inc.