数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ZUSBOPTSC01ZAC 数据表(PDF) 256 Page - Zilog, Inc.

部件名 ZUSBOPTSC01ZAC
功能描述  Z8 Encore-R Motor Control Flash MCUs
PDF  402 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ZILOG [Zilog, Inc.]
网页  http://www.zilog.com
标志 ZILOG - Zilog, Inc.

ZUSBOPTSC01ZAC 数据表(HTML) 256 Page - Zilog, Inc.

Back Button ZUSBOPTSC01ZAC Datasheet HTML 252Page - Zilog, Inc. ZUSBOPTSC01ZAC Datasheet HTML 253Page - Zilog, Inc. ZUSBOPTSC01ZAC Datasheet HTML 254Page - Zilog, Inc. ZUSBOPTSC01ZAC Datasheet HTML 255Page - Zilog, Inc. ZUSBOPTSC01ZAC Datasheet HTML 256Page - Zilog, Inc. ZUSBOPTSC01ZAC Datasheet HTML 257Page - Zilog, Inc. ZUSBOPTSC01ZAC Datasheet HTML 258Page - Zilog, Inc. ZUSBOPTSC01ZAC Datasheet HTML 259Page - Zilog, Inc. ZUSBOPTSC01ZAC Datasheet HTML 260Page - Zilog, Inc. Next Button
Zoom Inzoom in Zoom Outzoom out
 256 / 402 page
background image
Oscillator Control
P R E L I M I N A R Y
PS024604-1005
Z8 Encore!® Motor Control Flash MCUs
Product Specification
234
Oscillator Divide Register
The Oscillator Divide Register (OSCDIV) provides the value that divides the system
clock. The Oscillator Divide Register must be unlocked before writing. Writing the two-
step sequence E7h, followed by 18h, to the Oscillator Control Register address unlocks
the register. The register locks after completion of a register Write to the OSCDIV.
Bit
Position
Value
(H)
Description
[7]
INTEN
0
Internal Precision Oscillator Enable
Internal precision oscillator is disabled.
1
Internal precision oscillator is enabled.
[6]
XTLEN
0
Crystal Oscillator Enable
Crystal oscillator is disabled.
1
Crystal oscillator is enabled.
[5]
WDTEN
0
Watch-Dog Timer Oscillator Enable
Watch-Dog Timer oscillator is disabled
1
Watch-Dog Timer oscillator is enabled
[4]
POFEN
0
Primary Oscillator Failure Detection Enable
Failure detection and recovery of primary oscillator is disabled. This bit is cleared
automatically if a primary oscillator failure is detected.
1
Failure detection and recovery of primary oscillator is enabled
[3]
WDFEN
0
Watch-Dog Timer Oscillator Failure Detection Enable
Failure detection of Watch-Dog Timer oscillator is disabled.This bit is cleared
automatically if a Watch-Dog Timer oscillator failure is detected.
1
Failure detection of Watch-Dog Timer oscillator is enabled
[2]
FLPEN
0
Flash Low Power Mode Enable
Flash Low Power Mode is disabled.
1
Flash Low Power Mode is enabled. The Flash will be powered down during idle
periods of the clock and powered up during Flash reads. This bit should only be
set if the frequency of the primary oscillator source is 8MHz or lower. The reset
value of this bit is controlled by the LPDEN option bit during reset.
[1:0]
SCKSEL
00
01
10
11
System Clock Oscillator Select
Internal precision oscillator functions as system clock at 5.6 MHz
Crystal oscillator or external clock driver functions as system clock
Reserved
Watch-Dog Timer oscillator functions as system clock



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com