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ZUSBOPTSC01ZAC 数据表(PDF) 289 Page - Zilog, Inc. |
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ZUSBOPTSC01ZAC 数据表(HTML) 289 Page - Zilog, Inc. |
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289 / 402 page ![]() PS024604-1005 P R E L I M I N A R Y On-Chip Peripheral AC and DC Electrical Z8FMC16100 Series Flash MCU Product Specification 267 Table 144 provides electrical characteristics and timing information for the Watch-Dog Timer. Table 145 provides electrical characteristics and timing information for the Reset and Stop-Mode Recovery functions. Table 146 provides electrical characteristics and timing information for the Analog-to- Digital Converter and illustrates the input frequency response of the ADC. Table 144. Watch-Dog Timer Electrical Characteristics and Timing Symbol Parameter VDD = 2.7–3.6V TA = –40ºC to 105ºC Units Conditions Minimum Typical Maximum FOSC Output frequency 5 10 15 KHz VDD = 3.3V. ICC Supply current 2 µA VDD = 3.3V. Table 145. Reset and Stop-Mode Recovery Pin Timing Symbol Parameter TA = –40ºC to 105ºC Units Conditions Minimum Typical Maximum TRESET RESET pin assertion to initiate a System Reset. 4— — TCLK Not in STOP mode. TCLK = System Clock period. TSMR Stop-Mode Recovery pin pulse rejection period 10 20 40 ns RESET, DBG, and GPIO pins configured as SMR sources. Table 146. Analog-to-Digital Converter Electrical Characteristics and Timing Symbol Parameter TA = –40ºC to 105ºC Units Conditions Minimum Typical Maximum Resolution 10 — bits External VREF = 2.0V. Throughput conversion 13 CLKs ADC clock cycles. ADCCLK frequency 20 MHz DNL Differential nonlinearity for 8-bit use –0.99 1.25 LSB 20 MHz sys clock with ADC clock divided by 4 INL Integral nonlinearity for 8-bit use –1.25 1.25 LSB 20 MHz sys clock with ADC clock divided by 4 |
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