ZUSBOPTSC01ZAC datasheet(332/402 Pages) ZILOG

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PS024604-1005

P R E L I M I N A R Y

Appendix A—Register Tables

Z8 Encore!® Motor Control Flash MCUs

Product Specification

310

[6–5]

TICONFIG

Timer Interrupt Configuration—This field configures timer interrupt definitions.

These bits affect all modes. The effect per mode is explained below:

ONE SHOT, CONTINUOUS, COUNTER, PWM, COMPARE, DUAL PWM,

TRIGGERED ONE-SHOT, COMPARATOR COUNTER:

0x Timer interrupt occurs on reload.

10 Timer interrupts are disabled.

11 Timer Interrupt occurs on reload.

GATED:

0x Timer interrupt occurs on reload or inactive gate edge.

10 Timer interrupt occurs on inactive gate edge.

11 Timer interrupt occurs on reload.

CAPTURE, CAPTURE/COMPARE, CAPTURE RESTART:

0x Timer interrupt occurs on reload and capture.

10 Timer interrupt occurs on capture only.

11 Timer interrupt occurs on reload only

[4]

TINSEL

Timer Input Select

Timer input is the Timer input pin.

Timer input is the comparator output.

[3–1]

PWMD

000

001

010

011

100

101

110

111

PWM Delay Value

This field is a programmable delay to control the number of additional system

clock cycles following a PWM or Reload compare before the Timer Output or the

Timer Output Complement is switched to the active state. This field ensures a

time gap between the deassertion of one PWM output to the assertion of its

complement.

No delay

2 cycles delay

4 cycles delay

8 cycles delay

16 cycles delay

32 cycles delay

64 cycles delay

128 cycles delay

[0]

INCAP

Input Capture Event

Previous timer interrupt is not a result of a Timer Input Capture Event

Previous timer interrupt is a result of a Timer Input Capture Event.

Bit

Position

Value

(H)

Description

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