ZUSBOPTSC01ZAC datasheet(397/402 Pages) ZILOG

397 / 402 page

Z8FMC16100 Series Flash MCU

Product Specification

PS024604-1005

P R E L I M I N A R Y

Index

375

pop using extended addressing 284

POPX 284

port availability, device 35

port input timing (GPIO) 271

port output timing, GPIO 272

power supply signals 11

power-on reset (POR) 25

precharacterization product 304

program control instructions 285

program counter 280

program memory 14

PUSH 284

push using extended addressing 284

PUSHX 284

PxADDR register 40, 355, 356, 358

PxCTL register 41, 355, 357, 358

R 279

r 279

RCF 283, 284

receive

7-bit data transfer format (I2C) 175, 181, 182

IrDA data 147

receiving UART data-interrupt-driven method 116

receiving UART data-polled method 115

baud low and high byte (I2C) 187, 188, 193

baud rate high and low byte (SPI) 162

control (SPI) 158

control, I2C 186

data, SPI 157

flash control (FCTL) 217, 227, 361, 362

flash high and low byte (FFREQH and FRE-

EQL) 220

flash page select (FPS) 218

flash status (FSTAT) 218

GPIO port A-H address (PxADDR) 40, 355,

356, 358

GPIO port A-H alternate function sub-registers

43, 48

GPIO port A-H control address (PxCTL) 41,

355, 357, 358

GPIO port A-H data direction sub-registers 42

I2C baud rate high (I2CBRH) 188, 190, 192,

193, 337, 338

I2C control (I2CCTL) 186, 336

I2C data (I2CDATA) 184, 336

I2C status 185, 189, 336, 337

I2C status (I2CSTAT) 185, 189, 336, 337

I2Cbaud rate low (I2CBRL) 188, 337

mode, SPI 160

OCD status 254

SPI baud rate high byte (SPIBRH) 162, 341

SPI baud rate low byte (SPIBRL) 162, 341

SPI control (SPICTL) 158, 339

SPI data (SPIDATA) 157, 338

SPI status (SPISTAT) 159, 339

status, SPI 159

UARTx baud rate high byte (UxBRH) 140

UARTx baud rate low byte (UxBRL) 141, 335

UARTx Control 0 (UxCTL0) 135, 140, 333,

334, 335

UARTx control 1 (UxCTL1) 136, 138, 139,

334

UARTx receive data (UxRXD) 130, 333

UARTx status 0 (UxSTAT0) 131, 132, 333

UARTx status 1 (UxSTAT1) 133, 334

UARTx transmit data (UxTXD) 130, 332

watch-dog timer control (WDTCTL) 233,

235, 347, 348

watch-dog timer reload high byte (WDTH) 66,

360

watch-dog timer reload low byte (WDTL) 66,

361

address map 17

registers

ADC channel 1 203, 342

ADC data high byte 204, 205, 208, 209, 314,

315, 343, 344

ZUSBOPTSC01ZAC 数据表(PDF) 397 Page - Zilog, Inc.

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