EDBA164B4PR-1DITF-R datasheet(78/152 Pages) MICRON

78 / 152 page

Figure 51: Burst WRITE Followed by MRR – RL = 3, WL = 1, BL = 4

Bank n

col addr a

Col addr a

WRITE

CK_c

CA[9:0]

CMD

DQS_c

WL = 1

tWTR

Transitioning data

tMRR = 2

RL = 3

IN A0

IN A1

IN A2

IN A3

Valid

MRR1

NOP2

CK_t

DQS_t

Notes:

1. The minimum number of clock cycles from the burst WRITE command to the MRR com-

mand is [WL + 1 + BL/2 + RU(tWTR/tCK)].

2. Only the NOP command is supported during tMRR.

Temperature Sensor

The mobile LPDDR2 device features a temperature sensor whose status can be read

from MR4. This sensor can be used to determine an appropriate refresh rate, determine

whether AC timing derating is required in the extended temperature range, and/or

monitor the operating temperature. Either the temperature sensor or the device operat-

ing temperature can be used to determine whether operating temperature require-

ments are being met (see Operating Temperature Range table).

Temperature sensor data can be read from MR4 using the mode register read protocol.

Upon exiting self-refresh or power-down, the device temperature status bits will be no

older than tTSI.

When using the temperature sensor, the actual device case temperature may be higher

than the operating temperature specification that applies for the standard or extended

temperature ranges (see table noted above). For example, TCASE could be above 85˚C

when MR4[2:0] equals 011b.

To ensure proper operation using the temperature sensor, applications must accommo-

date the parameters in the temperature sensor definitions table.

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

MODE REGISTER READ

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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