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EDBA164B4PR-1DITF-R 数据表(PDF) 33 Page - Micron Technology |
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EDBA164B4PR-1DITF-R 数据表(HTML) 33 Page - Micron Technology |
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33 / 152 page  Table 13: MR0 Device Information (MA[7:0] = 00h) OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0 RFU RZQI RFU DI DAI Table 14: MR0 Op-Code Bit Definitions Notes 1–4 apply to all parameters and conditions Register Information Tag Type OP Definition Device auto initialization status DAI Read-only OP0 0b: DAI complete 1b: DAI in progress Device information DI Read-only OP1 0b:DDR2 Mobile RAM (S4 SDRAM) Built-in self test for RZQ information RZQI Read-only OP[4:3] 01b: ZQ pin might be connected to VDD2 or left floating 10b: ZQ pin might be shorted to ground 11b: ZQ pin self test complete; no error condition de- tected(ZQ-pin may not connect to VDD or float nor short to GND) Notes: 1. If RZQI is supported, it will be set upon completion of the MRW ZQ initialization calibra- tion. 2. If ZQ is connected to VDD2 to set default calibration, OP[4:3] must be set to 01. If ZQ is not connected to VDD2, either OP[4:3] = 01 or OP[4:3] = 10 could indicate a ZQ-pin as- sembly error. It is recommended that the assembly error be corrected. 3. In the case of a possible assembly error (either OP[4:3] = 01 or OP[4:3] = 10, as defined above), the device will default to factory trim settings for RON(output impedance) and will ignore ZQ calibration commands. In either case, the system might not function as intended. 4. If a ZQ self test returns a value of 11b, this indicates that the device has detected a resis- tor connection to the ZQ pin. Note that this result cannot be used to validate the ZQ resistor value, nor does it indicate that the ZQ resistor tolerance meets the specified lim- its (240 ohms ±1%). Table 15: MR1 Device Feature 1 (MA[7:0] = 01h) OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0 nWR (for AP) WC BT BL Table 16: MR1 Op-Code Bit Definitions Feature Type OP Definition Notes BL = burst length Write-only OP[2:0] 010b: BL4 (default) 1 011b: BL8 100b: BL16 All others: Reserved 216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM Mode Register Definition 09005aef85eb530a 216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN 33 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. |
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