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EDBA164B4PR-1DITF-R 数据表(PDF) 91 Page - Micron Technology |
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EDBA164B4PR-1DITF-R 数据表(HTML) 91 Page - Micron Technology |
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91 / 152 page ![]() Figure 63: REFRESH Command to Power-Down Entry CK_c CKE1 CMD REFRESH tIHCKE tISCKE T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 CK_t Note: 1. CKE can go LOW tIHCKE after the clock on which the REFRESH command is registered. Figure 64: ACTIVATE Command to Power-Down Entry Note: 1. CKE can go LOW at tIHCKE after the clock on which the ACTIVATE command is regis- tered. Figure 65: PRECHARGE Command to Power-Down Entry CK_c CKE1 CMD PRE tIHCKE tISCKE T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 CK_t Note: 1. CKE can go LOW tIHCKE after the clock on which the PRECHARGE command is regis- tered. 216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM Power-Down 09005aef85eb530a 216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN 91 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. |
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