| 数据搜索系统,热门电子元器件搜索 |
|
EDBA164B4PR-1DITF-R 数据表(PDF) 90 Page - Micron Technology |
|
|
|||||||||||||||||||||||||||||
EDBA164B4PR-1DITF-R 数据表(HTML) 90 Page - Micron Technology |
|
90 / 152 page ![]() Figure 62: WRITE with Auto Precharge to Power-Down Entry CK_c CKE1 T0 T1 Tm Tm + 1 Tm + 2 Tm + 3 Tx Tx + 1 Tx + 2 Tx + 3 Tx + 4 Tx + 5 Tx + 6 CMD DQ DQS_c WRITE w/AP PRE2 D IN D IN D IN D IN WL BL/2 BL/2 CK_t CKE1 T0 T1 Tm Tm + 1 Tm + 2 Tm + 3 Tm + 4 Tm + 5 Tx Tx + 1 Tx + 2 Tx + 3 Tx + 4 CMD DQ DQS_t D IN D IN D IN D IN D IN D IN D IN D IN WL tISCKE tWR tWR PRE2 BL = 4 BL = 8 WRITE w/AP CK_c DQS_c CK_t DQS_t tISCKE Notes: 1. CKE can be registered LOW at (WL + 1 + BL/2 + RU(tWR/tCK + 1) clock cycles after the WRITE command is registered. 2. Start internal PRECHARGE. 216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM Power-Down 09005aef85eb530a 216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN 90 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |