IP101G-DS-R01 datasheet(17/65 Pages) ETC

17 / 65 page

IP101G

Data Sheet

17/65

January 14, 2014

IP101G-DS-R01

IP101GR/GRI

Pin no.

Label

Type

Reset

Description

State

function.

In RMII mode, this pin indicates the Carrier Sense and

Receive Data Valid function.

RXCLK/

50M_CLKO

Hi-Z Receive Clock:

In MII mode, this pin provides 25MHz for 100BT or

2.5MHz for 10BT.

In RMII mode, this pin output a 50 MHz clock for the timing

reference of MAC side.

15,16,

17,18

RXD[3:0]

Hi-Z Receive Data:

In MII mode, RXD[3:0] is synchronous to RXCLK.

In RMII mode, RXD[1:0] is synchronous to 50M_CLKI.

RXER/INTR_32

O/OD

Hi-Z The multiplex function of this pin is set by the register

SEL_INTR32, page 16, 29[2]. The default function is

RXER.

Receive error:

RXDV

RXER

Description

Decoding

error

the

received signal

Combine RXD[3:0] equal to

0001

indicates

PHY

receiving LPI.

Normal operation

This pin RXER is an optional input for MAC/CPU device.

Interrupt:

Programmable Interrupt Output, this is an

open drain output, and an external pulled-up resistor is

needed.

COL/RMII

O/LI

(PD)

Collision Detected:

During the normal operation, this

pin outputs a high status signal it means collision is

detected.

RMII Mode Selection:

During the power on reset, this

pin status is latched to determine what kind MAC

interface will be used. Logic “1” is for RMII mode and

logic “0” is for MII mode.

CRS/LEDMOD

O/LI

(PD)

Carrier Sense:

When signal output from this pin is high

indicates the transmission or reception is in process and

at low status means the line is in idle state.

LEDMOD:

During power on reset, this pin status is

latched to determine which either LED mode 1 or 2 is

selected, please refer to the LED pins description.

Cable Transmission Interface

30,29 MDI_TP

MDI_TN

I/O

Hi-Z Transmit Output Pair: Differential pair shared by

100Base-TX and 10Base-T modes. When configured as

100Base-TX, output is an MLT-3 encoded waveform.

When configured as 10Base-T, the output is Manchester

code.

27,26 MDI_RP

MDI_RN

I/O

Hi-Z Receive Input Pair: Differential pair shared by

100Base-TX and 10Base-T modes.

Clock and Miscellaneous Pins

IP101G-DS-R01 数据表(PDF) 17 Page - List of Unclassifed Manufacturers

IP101G-DS-R01 数据表(HTML) 17 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65

数据表下载