IP101G-DS-R01 datasheet(13/65 Pages) ETC

13 / 65 page

IP101G

Data Sheet

13/65

January 14, 2014

IP101G-DS-R01

IP101GA

Pin no.

Label

Type

Reset

Description

State

In MII mode, TXD[3:0] is synchronous to TXCLK.

In RMII mode, TXD[1:0] is synchronous to 50M_CLKI.

RXDV/CRS_DV/

FX_HEN

O/LI

(PD)

Receive Data Valid or Media Type Selection:

FX_HEN

The input state is latched upon reset to determine

whether TP or fiber interface is selected. If it is at logic

“0” (default) state upon reset, the TP interface is

selected; otherwise the fiber interface is selected.

RXDV/CRS_DV

In MII mode, this pin indicates the Receive Data Valid

function.

In RMII mode, this pin indicates the Carrier Sense and

Receive Data Valid function.

RXCLK/

50M_CLKO

Hi-Z Receive Clock:

In MII mode, this pin provides 25MHz for 100BT or

2.5MHz for 10BT.

In RMII mode, this pin output a 50 MHz clock for the timing

reference of MAC side.

18,19,

20,21

RXD[3:0]

Hi-Z Receive Data:

In MII mode, RXD[3:0] is synchronous to RXCLK.

In RMII mode, RXD[1:0] is synchronous to 50M_CLKI.

RXER

Hi-Z Receive error:

RXDV

RXER

Description

Decoding

error

the

received signal

Combine RXD[3:0] equal to

0001

indicates

PHY

receiving LPI.

Normal operation

This pin RXER is an optional input for MAC/CPU device.

COL/RMII

O/LI

(PD)

Collision Detected:

During the normal operation, this

pin outputs a high status signal it means collision is

detected.

RMII Mode Selection:

During the power on reset, this

pin status is latched to determine what kind MAC

interface will be used. Logic “1” is for RMII mode and

logic “0” is for MII mode.

CRS/LEDMOD

O/LI

(PD)

Carrier Sense:

When signal output from this pin is high

indicates the transmission or reception is in process and

at low status means the line is in idle state.

LEDMOD:

During power on reset, this pin status is

latched to determine which either LED mode 1 or 2 is

selected, please refer to the LED pins description.

Cable Transmission Interface

34,33 MDI_TP

MDI_TN

I/O

Hi-Z Transmit Output Pair: Differential pair shared by

100Base-TX and 10Base-T modes. When configured as

100Base-TX, output is an MLT-3 encoded waveform.

When configured as 10Base-T, the output is Manchester

IP101G-DS-R01 数据表(PDF) 13 Page - List of Unclassifed Manufacturers

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IP101G-DS-R01 数据表(PDF) 13 Page - List of Unclassifed Manufacturers

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